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copyright ? cirrus logic, inc. 2012 (all rights reserved) http://www.cirrus.com aug '12 ds880f4 low-power, 4-in / 6-out hd audio codec with headphone amp digital to analog features ? dac1 (headphone) ? 101 db dynamic range (a-wtd) ? -89 db thd+n ? headphone amplifier - gnd centered ? integrated negative-voltage regulator ? no dc-blocking capacitor required ? 50 mw power/channel into 16 ? ? dac2 & dac3 (line outs) ? 110 db dynamic range (a-wtd) ? -94 db thd+n ? differential balanced or single-ended ? each dac supports 32 khz to 192 khz sample rates independently. ? digital volume control ? +6.0 db to -57.5 db in 0.5 db steps ? zero cross and/or soft ramp transitions ? independent support of d0 and d3 power states for each dac ? fast d3 to d0 transition ? audio playback in less than 50 ms analog to digital features ? adc1 & adc2 ? 105 db dynamic range (a-wtd) ? -88 db thd+n ? differential balanced or single-ended inputs ? analog programmable gain amplifier (pga) 12 db, 1.0 db steps, with zero cross transitions and mute ? mic inputs ? pre-amplifier with selectable 0 db, +10 db, +20 db, and +30 db gain settings ? programmable, low-noise mic bias level ? each adc supports 8 khz to 96 khz sample rates independently ? additional digital attenuation control ? -13.0 db to -51.0 db in 1.0 db steps ? zero cross and/or soft ramp transitions ? digital interface for two dual digital mic inputs ? independent support of d0 and d3 power states for each adc vl_hd (1.5 v to 3.3 v) src & multibit ?? modulator chrg pump invert left hp out left line out 2-chnl adc1 level translator hd audio bus line/mic in l line/mic in r headphone amp - gnd centered mic bias 2-chnl dac1 line out + - right line out + - left line out line out + - right line out + - + - + pga digital filter & src 2-chnl adc2 mic/line in l mic/line in r + - + - pga digital filter & src d-mic clock spdif tx 1 spdif rx src s/pdif out 1 s/pdif in gpio gpio right hp out d-mic in hd audio interface chrg pump buck +vhp -vhp 2-chnl dac2 2-chnl dac3 src & multibit ?? modulator src & multibit ?? modulator vd (1.5 v to 1.8 v) vol/mute vol/mute vol/mute vol/boost/ mute vol/boost/ mute va, va_ref (3.3 v to 5.0 v) va_hp (3.3 v to 5.0 v) mic bias level translator vl_if (3.3 v) jack sense sense_a spdif tx 2 s/pdif out 2 128fs clock multiplier hd bus fs spdif rx CS4207
2 ds880f4 CS4207 digital audio interface receiver ? complete eiaj cp1201, iec 60958, s/pdif compatible receiver ? 32 khz to 192 khz sample rate range ? automatic detection of compressed audio streams ? integrated sample rate converter ? 128 db dynamic range ? -120 db thd+n ? supports sample rates up to 192 khz ? 1:1 input/output sample rate ratios digital audio interface transmitters ? two independent eiaj cp1201, iec-60958, s/pdif compatible transmitters ? 32 khz to 192 khz sample rate range system features ? very low d3 power dissipation of <7 mw ? jack detect active in d3 ? hda bitclk not required for d3 state ? jack detect does not require hda bus bitclk ? all configuration settings are preserved in d3 state ? pop/click suppression in state transitions ? detects wake event and generates power state change request when hda bus controller is in d3 ? variable power supplies ? 1.5 v to 1.8 v digital core voltage ? 3.3 v to 5.0 v analog core voltage ? 3.3 v to 5.0 v headphone drivers ? 1.5 v to 3.3 v hd bus interface logic ? 3.3 v interface logic levels for gpio, s/pdif, and digital mic ? individual power-down managed ? adcs, dacs, pgas, headphone driver, s/pdif receiver, and transmitters general description the CS4207 is a highly in tegrated multi-channel low- power hd audio codec featuring 192 khz dacs, 96 khz adcs, 192 khz s/pdif transmitters and re- ceiver, microphone pre-amp and bias voltage, and a ground centered headphone driver. based on multi-bit, delta-sigma modulation, it a llows infinite sample rate adjustment between 32 khz and 192 khz. the adc input path allows control of a number of fea- tures. the microphone input path includes a selectable programmable-gain pre-amplifier stage and a low-noise mic bias voltage supply. a pg a is available for line and microphone inputs and provides analog gain with soft ramp and zero cross transitions. the adc also features an additional digital volume attenuator with soft ramp transitions. the stereo headphone amplifier is powered from a sep- arate internally generated positive supply, with an integrated charge pump providing a negative supply. this allows a ground-centered analog output with a wide signal swing and eliminates external dc-blocking capacitors. the integrated digital audio interface receiver and trans- mitters utilize a 24-bit, hi gh-performance , monolithic cmos stereo asynchronous sample rate converter to clock align the pcm samples to/from the s/pdif inter- faces. auto detection of non-pcm encoded data disables the sample rate conversion to preserve bit ac- curacy of the data. in addition to its many features, the CS4207 operates from a low-voltage analog and digital core, making this part ideal for portable syste ms that require low power consumption in a minimal amount of space. the CS4207 is available in a 48-pin wqfn package in both automotive (-40c to +105c) and commercial (-40c to +85c) grades. the CS4207 customer dem- onstration board is also available for device evaluation and implementation suggestions. please refer to ?or- dering information? on p 147 for complete ordering information.
ds880f4 3 CS4207 table of contents 1. pin descriptions ........................................................................................................... ................... 8 1.1 CS4207 48-pin qfn pinout: ................................................................................................. ........... 8 1.2 digital i/o pin characteristics ........................................................................................... ............. 10 2. typical connection diagrams ................................................................................................ .11 3. characteristics and specificatio ns .......... ................. ................................................ ......... 13 recommended operating conditions .................................................................................. 13 absolute maximum rating s ............... ................. ................................ .......................... ............ 13 analog input characteristics (commercial - cnz) ......................................................... 14 analog input characteristics (automotive - dnz) ......................................................... 15 adc digital filter characteristics ...................................................................................... 16 analog output characteristics (commercial - cnz) ..................................................... 17 analog output characteristics (automotive - dnz) ..................................................... 19 combined dac interpolation & on-chip analog filter response ............................. 21 dc electrical characteristics .............................................................................................. 21 digital microphone interface characteristics ............................................................. 22 digital interface specifications & characteris tics .................................................... 23 hd audio bus specifications & characteristics .............................................................. 23 s/pdif transmitter/receiver specifications & characteristics .. ................ ............ 23 power consumption ............................................................................................................. ...... 24 4. codec reset and initializati on ............... ................................................................ .............. .. 25 4.1 link reset ................................................................................................................ ...................... 25 4.2 function group reset ...................................................................................................... .............. 25 4.3 codec initialization ...................................................................................................... ................... 25 4.4 d3 lower power state support .............................................................................................. ....... 26 4.5 extended power states supported (epss) ......... ................. ................................................ ......... 2 6 4.6 power state settings reset (ps-settingsreset) ........................................................................... 28 4.7 register settings across resets ................... ........................................................................ ........ 29 5. presence detection ......................................................................................................... ............ 31 5.1 jack detection circuit .................................................................................................... ................ 31 5.1.1 presence detection and unso licited response .................................................................... 31 5.1.2 s/pdif receiver presence detect ........................................................................................ 3 2 6. hd audio codec supported verbs and responses ......................................................... 33 6.1 software programming model ................................................................................................ ....... 33 6.1.1 node id summary ......................................................................................................... ........ 34 6.1.2 pin configuration register defaults ..................................................................................... .35 6.2 root node (node id = 00h) ................................................................................................. .......... 36 6.2.1 vendor and device id .................................................................................................... ....... 36 6.2.2 revision id ............................................................................................................. ............... 36 6.2.3 subordinate node count .......................... ........................................................................ ..... 36 6.3 audio function group (node id = 01h) ...................................................................................... ... 37 6.3.1 subordinate node count .......................... ........................................................................ ..... 37 6.3.2 function group type ..................................................................................................... ........ 37 6.3.3 audio function group capabilities ........... ............................................................................ .37 6.3.4 supported pcm size, rates ............................................................................................... .. 38 6.3.5 support e d stream formats ...................... .......................................................................... ... 39 6.3.6 supported power states .................................................................................................. ..... 39 6.3.7 gpio capabilities ....................................................................................................... ........... 40 6.3.8 power states ............................................................................................................ ............. 41 6.3.9 gpio data ............................................................................................................... .............. 42 6.3.10 gpio enable mask ....................................................................................................... ....... 43 6.3.11 gpio direction ......................................................................................................... ........... 43 6.3.12 gpio sticky mask ....................................................................................................... ........ 43
4 ds880f4 CS4207 6.3.13 implementation identification .......................................................................................... ..... 44 6.3.14 function reset ......................................................................................................... ........... 44 6.4 dac1, dac2, dac3 output converter widgets (node id = 02h, 03h, 04h) ................................. 45 6.4.1 audio widget capabilities ............................................................................................... ...... 45 6.4.2 supported pcm size, rates ............................................................................................... .. 46 6.4.3 supported stream formats ................................................................................................ ... 46 6.4.4 supported power states .................................................................................................. ..... 47 6.4.5 output amplifier capabilities ................. .......................................................................... ...... 47 6.4.6 power states ............................................................................................................ ............. 48 6.4.7 converter stream, channel ............................................................................................... .... 49 6.4.8 converter format ........................................................................................................ .......... 49 6.4.9 amplifier ga in/mute ..................................................................................................... .......... 51 6.5 adc1, adc2 input converter widgets (node id = 05h, 06h) ....................................................... 53 6.5.1 audio widget capabilities ............................................................................................... ...... 53 6.5.2 supported pcm size, rates ............................................................................................... .. 54 6.5.3 supported stream formats ................................................................................................ ... 54 6.5.4 input amplifier capabilities ............................................................................................ ........ 55 6.5.5 connection list length .................................................................................................. ........ 55 6.5.6 supported power states .................................................................................................. ..... 56 6.5.7 adc1 connection list entry .............................................................................................. .... 56 6.5.8 adc1 connection select control .......................................................................................... 56 6.5.9 adc2 connection list entry .............................................................................................. .... 57 6.5.10 adc2 connection select control ........................................................................................ 5 7 6.5.11 power states ........................................................................................................... ............ 58 6.5.12 converter stream, channel .............................................................................................. ... 59 6.5.13 converter format ....................................................................................................... ......... 59 6.5.14 amplifier gain/mute .................................................................................................... ......... 61 6.6 s/pdif receiver input converter widget (node id = 07h) ........................................................... 63 6.6.1 audio widget capabilities ............................................................................................... ...... 63 6.6.2 supported pcm size, rates ............................................................................................... .. 64 6.6.3 supported stream formats ................................................................................................ ... 64 6.6.4 connection list length .................................................................................................. ........ 65 6.6.5 supported power states .................................................................................................. ..... 65 6.6.6 connection list entry ......................... .......................................................................... ......... 65 6.6.7 power states ............................................................................................................ ............. 66 6.6.8 converter stream, channel ............................................................................................... .... 67 6.6.9 converter format ........................................................................................................ .......... 67 6.6.10 digital converter control .............................................................................................. ....... 69 6.7 s/pdif transmitter 1, s/pdif transmitter 2 output converter widgets (node id = 08h, 14h) .... 70 6.7.1 audio widget capabilities ............................................................................................... ...... 70 6.7.2 supported pcm size, rates ............................................................................................... .. 71 6.7.3 supported stream formats ................................................................................................ ... 72 6.7.4 supported power states .................................................................................................. ..... 72 6.7.5 power states ............................................................................................................ ............. 72 6.7.6 converter stream, channel ............................................................................................... .... 74 6.7.7 converter format ........................................................................................................ .......... 74 6.7.8 digital converter control ....................... ........................................................................ ........ 76 6.8 headphone pin widget (node id = 09h) ...................................................................................... .78 6.8.1 audio widget capabilities ............................................................................................... ... ... 78 6.8.2 pin capabilities ........................................................................................................ .............. 78 6.8.3 connection list length .................................................................................................. ........ 79 6.8.4 supported power states .................................................................................................. ..... 79 6.8.5 connection list entry ......................... .......................................................................... ......... 80 6.8.6 power states ............................................................................................................ ............. 80
ds880f4 5 CS4207 6.8.7 pin widget control ...................................................................................................... .......... 81 6.8.8 unsolicited response control .................. .......................................................................... ... 82 6.8.9 pin sense ............................................................................................................... ............... 83 6.8.10 configuration default .................................................................................................. ......... 83 6.9 line out 1 pin widget (node id = 0ah) ..................................................................................... .... 85 6.9.1 audio widget capabilities ............................................................................................... ...... 85 6.9.2 pin capabilities ........................................................................................................ .............. 86 6.9.3 connection list length .................................................................................................. ........ 86 6.9.4 supported power states .................................................................................................. ..... 87 6.9.5 connection list entry ................................................................................................... ......... 87 6.9.6 power states ............................................................................................................ ............. 87 6.9.7 pin widget control ...................................................................................................... .......... 88 6.9.8 unsolicited response control .................. .......................................................................... ... 89 6.9.9 pin sense ............................................................................................................... ............... 90 6.9.10 eapd/btl enable ........ ................ ................. ................................................ ............... ....... 90 6.9.11 configuration default .................................................................................................. ......... 91 6.10 line out 2 pin widget (node id = 0bh) .................................................................................... ... 92 6.10.1 audio widget capabilities .............................................................................................. ..... 92 6.10.2 pin capabilities ....................................................................................................... ............. 93 6.10.3 connection list length ................................................................................................. ....... 93 6.10.4 connection list entry .................................................................................................. ........ 94 6.10.5 pin widget control ..................................................................................................... ......... 94 6.10.6 eapd/btl enable ............ ............................................................................................ ....... 95 6.10.7 configuration default .................................................................................................. ......... 96 6.11 line in 1/mic in 2, mic in 1/line in 2 pin wi dgets (node id = 0ch, 0dh) .................................... 97 6.11.1 audio widget capabilities .............................................................................................. ..... 97 6.11.2 line in 1/mic in 2 pin capabilities .................................................................................... ... 97 6.11.3 mic in 1/line in 2 pin capabilities .................................................................................... ... 98 6.11.4 input amplifier capabilitie s ........................................................................................... ....... 99 6.11.5 supported power states ................................................................................................. .... 99 6.11.6 power states ........................................................................................................... ............ 99 6.11.7 line in 1/mic in 2 pin widget control ................................................................................ 10 1 6.11.8 mic in 1/line in 2 pin widget control ................................................................................ 10 1 6.11.9 unsolicited response control ................... ........................................................................ 102 6.11.10 pin sense ............................................................................................................. ........... 103 6.11.11 mic in 1/line in 2 eapd/btl enable ...... ........................................................................ 104 6.11.12 line in 1/mic in 2 configuration default .......................................................................... 104 6.11.13 mic in 1/line in 2 config uration default .......................................................................... 105 6.11.14 amplifier gain/mute ........................... ........................................................................ ...... 106 6.12 digital mic in 1, digital mic in 2 pin widgets (node id = 0eh, 12h) ........................................... 108 6.12.1 audio widget capabilities .............................................................................................. ... 108 6.12.2 pin capabilities ....................................................................................................... ........... 109 6.12.3 input amplifier capabilitie s .. ......................................................................................... ..... 109 6.12.4 pin widget control ..................................................................................................... ....... 110 6.12.5 digital mic in 1 configuration default ................................................................................ 1 10 6.12.6 digital mic in 2 configuration default ................................................................................ 1 11 6.12.7 amplifier gain/mute ...... .............................................................................................. ....... 112 6.13 s/pdif receiver input pin widget (node id = 0fh) .................................................................. 114 6.13.1 audio widget capabilities .............................................................................................. ... 114 6.13.2 pin capabilities ....................................................................................................... ........... 115 6.13.3 supported power states ................................................................................................. .. 115 6.13.4 power states ........................................................................................................... .......... 116 6.13.5 pin widget control ..................................................................................................... ....... 117 6.13.6 unsolicited response control ................... ........................................................................ 117
6 ds880f4 CS4207 6.13.7 pin sense .............................................................................................................. ............ 118 6.13.8 configuration default . ................................................................................................. ....... 119 6.14 s/pdif transmitter 1, s/pdif transmitter 2 ou tput pin widgets (node id = 10h, 15h) ........... 120 6.14.1 audio widget capabilities ...................... ........................................................................ ... 120 6.14.2 pin capabilities ....................................................................................................... ........... 121 6.14.3 connection list length ................................................................................................. ..... 121 6.14.4 s/pdif transmitter 1 con nection list entry ..................................................................... 122 6.14.5 s/pdif transmitter 2 con nection list entry ..................................................................... 122 6.14.6 pin widget control .... ................................................................................................. ....... 123 6.14.7 s/pdif transmitter 1 conf iguration default ...................................................................... 124 6.14.8 s/pdif transmitter 2 conf iguration default ...................................................................... 125 6.15 vendor processing widget (node id = 11h) .............................................................................. 126 6.15.1 audio widget capabilities ...................... ........................................................................ ... 126 6.15.2 processing capabilities ................................................................................................ ..... 126 6.15.3 processing state ....................................................................................................... ........ 127 6.15.4 coefficient index ............................... ....................................................................... .......... 127 6.15.5 processing coefficient ......................... ........................................................................ ...... 128 6.15.6 coefficient registers . ................................................................................................. ....... 128 6.15.6.1 s/pdif rx/tx interface status (cir = 0000h) ...................................................... 129 6.15.6.2 s/pdif rx/tx interface control (cir = 0001h) .................................................... 130 6.15.6.3 adc configuration (cir = 0002h) ......................................................................... 131 6.15.6.4 dac configuration (cir = 0003h) ......................................................................... 134 6.15.6.5 beep configuration (cir = 0004h) ........................................................................ 135 6.16 beep generator widget (node id = 13h) .................................................................................. 13 6 6.16.1 audio widget capabilities ...................... ........................................................................ ... 136 6.16.2 beep generation control ................................................................................................ ... 137 7. applications ............................................................................................................... .................. 138 7.1 hd audio interface ........................................................................................................ ............... 138 7.1.1 multi-channel streams ................................................................................................... ..... 138 7.2 analog inputs ............................................................................................................. .................. 139 7.3 analog outputs ............................................................................................................ ................ 142 7.3.1 output filter ........................................................................................................... .............. 142 7.3.2 analog supply removal ................................................................................................... ... 142 7.4 digital mic inputs ........................................................................................................ .................. 142 7.5 s/pdif input and outputs .................................................................................................. .......... 143 7.5.1 s/pdif receiver src ..................................................................................................... .... 143 8. pcb layout considerations .................................................................................................. .144 8.1 power supply, grounding ................................................................................................... ......... 144 8.2 qfn thermal pad ........................................................................................................... ............. 144 9. parameter definitions ...................................................................................................... ........ 145 10. qfn package dimensions .................................................................................................... .... 146 thermal characteristics ....................................................................................................... 146 11. ordering information ...................................................................................................... ...... 147 12. references ................................................................................................................ .................. 147 13. revision history .......................................................................................................... .............. 148
ds880f4 7 CS4207 list of figures figure 1.typical connection diagram - desktop system ......................................................................... 1 1 figure 2.typical con nection diagram - portable system ......... ................................................................ 12 figure 3.output test load, headphone out ...................................................................................... ....... 18 figure 4.output test load, line out ........................................................................................... .............. 18 figure 5.output test load, headphone out ...................................................................................... ....... 20 figure 6.output test load, line out ........................................................................................... .............. 20 figure 7.digital mic interface timing ......................................................................................... ............... 22 figure 8.ps-settingsreset behavior ............................................................................................ ............ 28 figure 9.jack presence detect circuit ......................................................................................... ............. 31 figure 10.software programming model .......................................................................................... ........ 33 figure 11.single-ended input filter ........................................................................................... ............. 139 figure 12.pseudo-differential input filter .................................................................................... ........... 140 figure 13.differential input filter ........................................................................................... .................. 141 figure 14.differential to single-ended output filter .......................................................................... ..... 142 figure 15.passive single-ended output filter .................................................................................. ...... 142 list of tables table 1. register settings across reset conditio ns ............................................................................ .... 29 table 2. device node id summary ............................................................................................... ............ 34 table 3. pin configuration register defaults .................................................................................. .......... 35 table 4. stream format examples ............................................................................................... .......... 138 table 5. line in 1/mic in 2 input topology register settings .................................................................. 139 table 6. mic in 1/line in 2 input topology register settings .................................................................. 139
8 ds880f4 CS4207 1. pin descriptions 1.1 CS4207 48-pin qfn pinout: pin name qfn pin description vl_if 1 digital interface signal level ( input ) - digital supply for the gpio, s/pdif and digital mic inter- faces. refer to the recommended operatin g conditions for appropriate voltages. gpio0/ dmic_sda1 2 general purpose i/o ( input/output ) - general purpose input or output line, or digital mic data input ( input ) - the first data input line from a digital microphone. vl_hd 3 digital interface signal level ( input ) - digital supply for the hd audio interface. refer to the recommended operating conditions for appropriate voltages. dmic_scl 4 digital mic clock (output ) - the high speed clock output to the digital microphone. sdo 5 serial data input ( input ) - serial data input stream from the hd audio bus. bitclk 6 bit clock ( input ) - 24 mhz bit clock from the hd audio bus. dgnd 7 digital ground ( input ) - ground reference for the internal digital section. sdi 8 serial data output (input/output ) - serial data output stream to the hd audio bus. vd 9 digital power ( input ) - positive power for the internal digital section. sync 10 sync clock ( input ) - 48 khz sync clock from the hd audio bus. hpref thermal pad 1413 8 7 6 5 4 3 2 1 15 16 17 18 19 20 29 30 31 32 33 34 35 36 41 42 43 44 45 464748 37 38 39 40 12 11 10 9 21 22 23 24 25 26 27 28 spdif_out1 sense_a vl_if lineout_r1+ top-down (through package) view 48-pin qfn package lineout_l1+ lineout_l1- lineout_r2- lineout_r2+ lineout_l2+ lineout_l2- vbias (dac) vcom vref+ (adc) agnd va spdif_in flyn flyc vhp_filt- flyp hpout_l hpref hpout_r va_hp lineout_r1- gpio0/dmic_sda1 vl_hd dmic_scl sdo bitclk dgnd sdi vd sync reset# gpio1/dmic_sda2 /spdif_out2 micbias micin_l- micin_l+ micin_r+ gpio2 gpio3 micin_r- linein_l+ linein_c- linein_r+ va_ref vhp_filt+ hpgnd
ds880f4 9 CS4207 reset# 11 reset ( input ) - the device enters a low power mode when this pin is driven low. gpio1/ dmic_sda2/ spdif_out2 12 general purpose i/o ( input/output ) - general purpose input or output line, or digital mic data input (input ) - the second data input line from a digital microphone, or s/pdif output ( output ) - output from internal s/pdif transmitter. sense_a 13 jack sense pin ( input/output ) - jack sense detect. gpio2 14 general purpose i/o ( input/output ) - general purpose input or output lines. gpio3 15 general purpose i/o ( input/output ) - general purpose input or output lines. micbias 16 microphone bias (output ) - provides a low noise bias supply for an external microphone. elec- trical characteristics are specified in the dc electrical characteristics table. micin_l- micin_l+ micin_r+ micin_r- 17 18 19 20 microphone input left/right ( input ) - the full-scale level is specified in the adc analog char- acteristics specification table. linein_l+ linein_c- linein_r+ 21 22 23 analog input ( input ) - the full-scale level is specified in the adc analog characteristics specifi- cation table. va_ref va 24 25 analog power (input ) - positive power for the internal analog section. va_ref is the return pin for the vbias cap. agnd 26 analog ground ( input ) - ground reference for the internal analog section. vref+ 27 positive voltage reference (ou tp ut ) - positive reference voltage for the internal adcs. vcom 28 quiescent voltage ( output ) - filter connection for internal quiescent voltage. vbias 29 positive voltage reference ( output ) - positive reference voltage for the internal dacs. lineout_l2- lineout_l2+ lineout_r2+ lineout_r2- lineout_l1- lineout_l1+ lineout_r1+ lineout_r1- 30 31 32 33 34 35 36 37 analog audio output (output ) - the full-scale output level is specified in the dac analog char- acteristics specification table hpout_l hpout_r 38 40 analog headphone output (output) - the full-scale output level is specified in the dac analog characteristics specification table. hpref 39 pseudo diff. headphone reference ( input ) - ground reference for the headphone amplifiers. vhp_filt- 41 inverting charge pump filter connection (output) - power supply from the inverting charge pump that provides t he negative rail for the headphone amplifier. flyn 42 charge pump cap negative node (output) - negative node for the inverting charge pump?s fly- ing capacitor. flyc 43 charge pump cap common node (output) - common positive node for the step-down and inverting charge pumps? flying capacitor. vhp_filt+ 44 non-inverting charge pump filter connection (output) - power supply from the step-down charge pump that provides the posit ive rail for the headphone amplifier. flyp 45 charge pump cap positive node (output) - positive node for the step-down charge pump?s fly- ing capacitor. va_hp 46 analog power for headphone (input) - positive power for the internal analog headphone sec- tion. spdif_in 47 s/pdif input ( input ) - input to internal s/pdif receiver. spdif_out1 48 s/ pdif output ( output ) - output from internal s/pdif transmitter. hpgnd tp hp ground ( input ) - ground reference for the internal headphone section. see ?qfn thermal pad? on page 144 for more information. pin name qfn pin description
10 ds880f4 CS4207 1.2 digital i/o pin characteristics input and output levels and associated power supply voltage are shown in the table below. logic levels should not exceed the corresponding power supply voltage. notes: 1. sdi output functionality also requires the va and vl_if rails to be at nominal levels. power supply pin name sw/(hw) i/o driver receiver vl_hd reset# input - 1.5 v - 3.3 v sdo input - 1.5 v - 3.3 v bitclk input - 1.5 v - 3.3 v sdi (note 1) input/output 1.5 v - 3.3 v 1.5 v - 3.3 v sync input - 1.5 v - 3.3 v va sense_a input - 3.3 v - 5.0 v vl_if gpio1/ dmic_sda2 input/output 3.3 v 3.3 v gpio2 input/output 3.3 v 3.3 v gpio3 input/output 3.3 v 3.3 v spdif_in input - 3.3 v spdif_out output 3.3 v - gpio0/ dmic_sda1 input/output 3.3 v 3.3 v dmic_scl output 3.3 v -
ds880f4 11 CS4207 2. typical connec tion diagrams 1 f vref+ 0.1 f hp_gnd(thermal pad) vl_hd 0.1 f +1.5 v to +3.3 v reset# sdi bitclk sync va * capacitors must be c0g or equivalent micin_l+ differential mic left sdo CS4207 micbias hpout_l hpout_r r l the value of r l is dictated by the microphone cartridge. hd audio bus left headphone flyp vhp_filt+ 2.2 f microphone bias 1 f 0.47 f 10 f ** ** ** use low esr ceramic capacitors. lineout_l1+ +left line output 1 lineout_l1- right headphone lineout_r1+ +right line output 1 lineout_r1- 0.1 f 33 ? 1 f micin_l- 1 f r l differential mic right 1 f micin_r+ micin_r- lineout_l2+ +left line output 2 lineout_l2- lineout_r2+ +right line output 2 lineout_r2- gpio2 gpio2 gpio3 gpio3 spdif_in spdif_out1 s/pdif tx 1 s/pdif rx sense_a sense_a dmic_sda1 d-mic in 1 hpref 0.1 f 33 ? headphone ground +5.0 v differential to single-ended output filter differential to single-ended output filter differential to single-ended output filter differential to single-ended output filter va_hp 2.2 f ** flyn vhp_filt- +1.8 v 0.1 f vd +5.0 v agnd 10 f 0.1 f ** vl_if 0.1 f +3.3 v flyc vcom 10 f ? input and output filters are optional. ? ? ? ? dmic_sda2/ spdif_out2 d-mic in 2 / s/pdif tx 2 dmic_scl d-mic clk linein_l+ linein_c- linein_r+ left analog input 1 f 1800 pf * 1 f right analog input 1 f 1800 pf * 10 f vbias + va_ref 0.1 f +5.0 v figure 1. typical connection diagram - desktop system *** see figure 9 . ***
12 ds880f4 CS4207 * capacitors must be c0g or equivalent speaker driver 2200 pf 560 ? * speaker driver 2200 pf 560 ? * 560 ? 560 ? 1 f vref+ 0.1 f hp_gnd(thermal pad) vl_hd 0.1 f +1.5 v to +3.3 v reset# sdi bitclk sync va micin_l+ sdo CS4207 micbias hpout_l hpout_r linein_l+ left mic in linein_c- r l the value of r l is dictated by the microphone cartridge. hd audio bus left headphone linein_r+ right mic in flyp vhp_filt+ 2.2 f microphone bias 1 f 0.47 f 10 f ** ** * *use low esr ceramic capacitors. lineout_l1+ lineout_l1- right headphone lineout_r1+ lineout_r1- 0.1 f 33 ? micin_l- 1 f r l micin_r+ lineout_l2+ lineout_l2- lineout_r2+ lineout_r2- gpio2 gpio2 gpio3 gpio3 sense_a sense_a hpref 0.1 f 33 ? headphone ground +3.3 v va_hp 2.2 f ** flyn vhp_filt- +1.8 v 0.1 f vd +3.3 v agnd 10 f 0.1 f ** vl_if 0.1 f +3.3 v flyc vcom 10 f micin_r- left analog input 1 f 1800 pf * 1 f right analog input 1 f 1800 pf * spdif_in spdif_out1 s/pdif tx 1 s/pdif rx dmic_sda1 d-mic in 1 d-mic in 2 / s/pdif tx 2 dmic_scl d-mic clk dmic_sda2/ spdif_out2 10 f vbias + va_ref 0.1 f +3.3 v figure 2. typical connection diagram - portable system *** see figure 9 . ***
ds880f4 13 CS4207 3. characteristics and specifications recommended operating conditions (agnd=dgnd=0 v, all voltages with respect to ground.) absolute maximum ratings (agnd = dgnd = 0 v; all voltages with respect to ground.) warning: operation at or beyond these limit s may result in permanent damage to the device. normal operation is not guaranteed at these extremes. notes: 1. the device will operate properly ov er the full range of the analog, digital and interface supplies. 2. any pin except supplies. transien t currents of up to 100 ma on the analog input pins will not cause scr latch-up. 3. the maximum over/under voltage is limited by the input current. parameters symbol min max units dc power supply (note 1) analog core va 2.97 5.25 v dac reference va_ref 2.97 5.25 v headphone amplifier va_hp 2.97 5.25 v digital core vd 1.42 1.89 v hd audio bus interface vl_hd 1.42 3.47 v gpio, s/pdif and digital mic interface vl_if 2.97 3.47 v ambient temperature commercial - cnz automotive - dnz t a -40 -40 +85 +105 ? c ? c parameters symbol min max units dc power supply analog core dac reference headphone amplifier digital core hd audio interface gpio, s/pdif and digital mic interface va va_ref va_hp vd vl_hd vl_if -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 5.5 5.5 5.5 3.0 4.0 4.0 v v v v v v input current (note 2) i in -10ma analog input voltage (note 3) v in agnd-0.7 va+0.7 v digital input voltage (note 3) hd audio interface gpio, s/pdif and digital mic interface v ind -0.3 -0.3 vl_hd+0.4 vl_if+0.4 v v ambient operating temperature (power applied) t a -55 +115 c storage temperature t stg -65 +150 c
14 ds880f4 CS4207 analog input ch aracteristics (commercial - cnz) (test conditions (unless otherwise specified): input sine wa ve (relative to digital full-scale): 1 khz through passive input filter; va_hp = va; vl_hd = vl_if = 3.3; vd = 1.8 v; t a = +25 ? c; measurement bandwidth is 10 hz to 20 khz unless otherwise specified. sample frequency = 48 khz) va, va_ref = 5.0 v (differential/single-ended) va, va_ref = 3.3 v (differential/single-ended) parameter (note 4) min typ max min typ max unit line in to pga to adc (adc1 or adc2; differen tial perf. characteristics only valid for adc2) dynamic range pga setting: 0 db a-weighted unweighted 99/96 96/93 105/102 102/99 - - 95/93 92/90 101/99 98/96 - - db db pga setting: +12 db a-weighted unweighted 95/86 92/83 101/92 98/89 - - 92/83 89/80 98/89 95/86 - - db db total harmonic distortion + noise pga setting: 0 db -1 dbfs -60 dbfs - - -88/-88 -42/-39 -82/-82 -36/-33 - - -95/-92 -38/-36 -89/-86 -32/-30 db db pga setting: +12 db -1 dbfs - -88/-88 -82/-82 - -92/-86 -86/-80 db mic in to pga to adc (+20 db) ( adc1 or adc2; differential perf. characteristics only valid for adc2) dynamic range a-weighted unweighted 86/78 83/75 92/84 89/81 - - 83/75 80/72 89/81 86/78 - - db db total harmonic distortion + noise -1 dbfs - -89/-82 -83/-76 - -86/-78 -80/-72 db other analog characteristics dc accuracy interchannel gain mismatch - 0.2 - - 0.2 - db gain drift - 100 - - 100 - ppm/c offset error high pass filter on - 352 - - 352 - lsb interchannel isolation - 90 - - 90 - db hp amp to analog input isolation r l = 10 k ? r l = 16 ? - - 100 70 - - - - 100 70 - - db db full-scale input voltage - line in/mic in (differential inputs) pga(0db) 1.58?va 1.66?va 1.74?va 1.58?va 1.66?va 1.74?va vpp full-scale input voltage - line in pga (0db) (single-ended inputs) pga (+12db) 0.79?va 0.83?va 0.21?va 0.87?va 0.79?va 0.83?va 0.21?va 0.87?va vpp vpp full-scale input voltage - mic in pga+boost(0db) (single-ended inputs) pga+boost(+20db) 0.79?va 0.83?va 0.08?va 0.87?va 0.79?va 0.83?va 0.08?va 0.87?va vpp vpp input impedance (note 5) mic in (differential or pseudo-diff) line in (pseudo-diff, pga = -12/0/+12 db) mic/line in (single-ended, pga = -12/0/+12 db) - - - 43.5 93/99/103 27/33/37 - - - - - - 43.5 93/99/103 27/33/37 - - - k ? k ? k ? common mode rejection (differential inputs) -60--60-db
ds880f4 15 CS4207 analog input characteristics (automotive - dnz) (test conditions (unless otherwise specif ied): input sine wave (relative to di gital full-scale): 1 khz through passive input filter; va_hp = va; vl_hd = vl_if = 3.3; vd = 1.8 v; t a = -40 to +85 ? c; measurement bandwidth is 10 hz to 20 khz unless otherwise specified. sample frequency = 48 khz) 4. referred to the typical full-scale voltage. applies to all thd+n and dynamic range values in the table. 5. measured between [line/mic]in_[ l/r]+ and [line/mic]in_[c/l/r]- for differential and pseudo-differ- ential inputs, and between [line/mic]in_[l/r]+ and agnd for single-ended inputs. va, va_ref = 5.0 v (differential/s ingle-ended) va, va_ref = 3.3 v (differential/single-ended) parameter (note 4) min typ max min typ max unit line in to pga to adc (adc1 or adc2; differential perf. char acteristics only valid for adc2) dynamic range pga setting: 0 db a-weighted unweighted 99/96 96/93 105/102 102/99 - - 95/93 92/90 101/99 98/96 - - db db pga setting: +12 db a-weighted unweighted 95/86 92/83 101/92 98/89 - - 92/83 89/80 98/89 95/86 - - db db total harmonic distortion + noise pga setting: 0 db -1 dbfs -60 dbfs - - -88/-88 -42/-39 -82/-82 -36/-33 - - -95/-92 -38/-36 -89/-86 -32/-30 db db pga setting: +12 db -1 dbfs - -88/-88 -82/-82 - -92/-86 -86/-80 db mic in to pga to adc (+20 db) (adc1 or adc2; diff erential perf. characteri stics only valid for adc2) dynamic range a-weighted unweighted 86/78 83/75 92/84 89/81 - - 83/75 80/72 89/81 86/78 - - db db total harmonic distortion + noise -1 dbfs - -89/-82 -83/-76 - -86/-78 -80/-72 db other analog characteristics dc accuracy interchannel gain mismatch - 0.2 - - 0.2 - db gain drift - 100 - - 100 - ppm/c offset error high pass filter on - 352 - - 352 - lsb interchannel isolation - 90 - - 90 - db hp amp to analog input isolation r l = 10 k ? r l = 16 ? - - 100 70 - - - - 100 70 - - db db full-scale input voltag e - line in/mic in (differential inputs) pga(0db) 1.58?va 1.66?va 1.74?va 1.58?va 1.66?va 1.74?va vpp full-scale input voltage - line in pga(0db) (single-ended inputs) pga(+12db) 0.79?va 0.83?va 0.21?va 0.87?va 0.79?va 0.83?va 0.21?va 0.87?va vpp vpp full-scale input voltage - mic in pga+boost(0db) (single-ended inputs) pga+boost(+20db) 0.79?va 0.83?va 0.08?va 0.87?va 0.79?va 0.83?va 0.08?va 0.87?va vpp vpp input impedance (note 5) mic in (differential or pseudo-diff) line in (pseudo-diff, pga = -12/0/+12 db) mic/line in (single-ended, pga = -12/0/+12 db) - 43.5 93/99/103 27/33/37 -- 43.5 93/99/103 27/33/37 - k? k? k? common mode rejection (dif ferential inputs) - 60 - - 60 - db
16 ds880f4 CS4207 adc digital filter characteristics 6. response is clock dependent and will scale with fs. parameter (note 6) min typ max unit passband (frequency response) to -0.1 db corner 0 - .4535 fs passband ripple -0.09 - 0.17 db stopband 0.6 - - fs stopband attenuation 70 - - db total group delay - 7.6/fs - s high-pass filter characteristics (48 khz fs) frequency response -3.0 db -0.13 db - - 3.6 24.2 - - hz hz phase deviation @ 20 hz - 10 - deg passband ripple - - 0.17 db filter settling time - 10 5 /fs 0s
ds880f4 17 CS4207 analog output characteris tics (commercial - cnz) (test conditions (unless otherwise spec ified): input test signal is a full- scale 997 hz sine wave; vd = 1.8 v; vl_hd = vl_if = 3.3v; t a = +25 ? c; measurement bandwidth is 10 hz to 20 khz; test load r l = 10 k ?? c l = 10 pf ? for the line output and test load r l = 16 ?? c l = 10 pf for the headphone output (see figure 3 ); dac gain = 0 db). va, va_ref = 5.0 v va_hp = 5.0 v (single-ended) va, va_ref = 3.3 v va_hp = 3.3 v (single-ended) parameter (note 4) min typ max min typ max unit dac1; r l = 16 ? ; dac gain = -5 db dynamic range 18 to 24-bit a-weighted unweighted 16-bit a-weighted unweighted 95 92 - - 101 98 93 90 - - - - 93 90 - - 99 96 93 90 - - - - db db db db total harmonic distortion + noise 18 to 24-bit 0 db -20 db -60 db 16-bit 0 db -20 db -60 db - - - - - - -89 -78 -38 -89 -70 -30 -83 -72 -32 - - - - - - - - - -93 -76 -36 -90 -70 -30 -87 -70 -30 - - - db db db db db db dac1; r l = 10 k ? dynamic range 18 to 24-bit a-weighted unweighted 16-bit a-weighted unweighted 100 97 - - 106 103 96 93 - - - - 98 95 - - 104 101 96 93 - - - - db db db db total harmonic distortion + noise 18 to 24-bit 0 db -20 db -60 db 16-bit 0 db -20 db -60 db - - - - - - -88 -83 -43 -88 -73 -33 -82 -77 -37 - - - - - - - - - -90 -81 -41 -90 -73 -33 -84 -75 -35 - - - db db db db db db other characteristics for dac1; r l = 16 ? or 10 k ? full-scale output voltage, r l = 10 k ? 0.80?va 0.84?va 0.88?va 0.80?va 0.84?va 0.88?va vpp output power, thd+n = -75 db, r l = 16 ? -38- -17-mw rms output power, thd+n = 1%, r l = 16 ? -50- -23-mw rms output power,th d+n = 10%, r l = 16 ? -74- -35-mw rms interchannel isolation (1 khz) 16 ? 10 k ? - - 80 95 - - - - 80 93 - - db db interchannel gain mismatch - 0.1 0.25 - 0.1 0.25 db output offset voltage dac to hpout - 2 4 - 2 4 mv gain drift - 100 - - 100 - ppm/c ac-load resistance (r l ) (note 7) 16 - - 16 - - ? load capacitance (c l ) (note 7) - - 150 - - 150 pf output impedance - 300 - - 300 - m ?
18 ds880f4 CS4207 7. see figure 3 and figure 4 . r l and c l reflect the recommended minimum resistance and maximum ca- pacitance required for the internal op -amp's stability and signal integrity. va, va_ref = 5.0 v (differential/single-ended) va, va_ref = 3.3 v (differential/single-ended) parameter (note 4) min typ max min typ max unit dac2/dac3; r l = 10 k ? dynamic range 18 to 24-bit a-weighted unweighted 16-bit a-weighted unweighted 104/100 101/97 - - 110/106 107/103 96 93 - - - - 101/97 98/94 - - 107/103 104/100 96 93 - - - - db db db db total harmonic distortion + noise 18 to 24-bit 0 db -20 db -60 db 16-bit 0 db -20 db -60 db - - - - - - -94/-91 -87/-83 -47/-43 -92 -73 -33 -88/-85 -81/-77 -41/-37 - - - - - - - - - -96/-94 -84/-80 -44/-40 -92 -73 -33 -90/-88 -78/-74 -38/-34 - - - db db db db db db other characteristics for dac2/dac3; r l = 10 k ? full-scale output voltage 1.60?va/ 0.80?va 1.68?va/ 0.84?va 1.76?va/ 0.88?va 1.60?va/ 0.80?va 1.68?va/ 0.84?va 1.76?va/ 0.88?va vpp interchannel isolation (1 khz) - 100 - - 100 - db interchannel gain mismatch - 0.1 0.25 - 0.1 0.25 db gain drift - 100 - - 100 - ppm/c ac-load resistance (r l ) (note 7) 3- -3- -k ? load capacitance (c l ) (note 7) --100--100pf output impedance - 100 - - 100 - ? agnd r l c l 0.1 ? f 33 ? hpout_l/r agnd r l c l lineout_l/r figure 3. output test load, headphone ou t figure 4. output test load, line out
ds880f4 19 CS4207 analog output characteris tics (automotive - dnz) (test conditions (unless otherwise spec ified): input test signal is a full-scale 997 hz sine wave; vd = 1.8 v; vl_hd = vl_if = 3.3v; t a = -40 to +85 ? c; measurement bandwidth is 10 hz to 20 khz; test load r l = 10 k ?? c l = 10 pf ? for the line output and test load r l = 16 ?? c l = 10 pf for the headphone output (see figure 5 ); dac gain = 0 db). va, va_ref = 5.0 v va_hp = 5.0 v (single-ended) va, va_ref = 3.3 v va_hp = 3.3 v (single-ended) parameter (note 4) min typ max min typ max unit dac1; r l = 16 ? ; dac gain = -5 db dynamic range 18 to 24-bit a-weighted unweighted 16-bit a-weighted unweighted 95 92 - - 101 98 93 90 - - - - 93 90 - - 99 96 93 90 - - - - db db db db total harmonic distortion + noise 18 to 24-bit 0 db -20 db -60 db 16-bit 0 db -20 db -60 db - - - - - - -89 -78 -38 -89 -70 -30 -83 -72 -32 - - - - - - - - - -93 -76 -36 -90 -70 -30 -87 -70 -30 - - - db db db db db db dac1; r l = 10 k ? dynamic range 18 to 24-bit a-weighted unweighted 16-bit a-weighted unweighted 100 97 - - 106 103 96 93 - - - - 98 95 - - 104 101 96 93 - - - - db db db db total harmonic distortion + noise 18 to 24-bit 0 db -20 db -60 db 16-bit 0 db -20 db -60 db - - - - - - -88 -83 -43 -88 -73 -33 -82 -77 -37 - - - - - - - - - -90 -81 -41 -90 -73 -33 -84 -75 -35 - - - db db db db db db other characteristics for dac1; r l = 16 ? or 10 k ? full-scale output voltage, r l = 10 k ? 0.80?va 0.84?va 0.88?va 0.80?va 0.84?va 0.88?va vpp output power, thd+n = -75 db, r l = 16 ? -38- -17-mw rms output power, thd+n = 1%, r l = 16 ? -50- -23-mw rms output power,th d+n = 10%, r l = 16 ? -74- -35-mw rms interchannel isolation (1 khz) 16 ? 10 k ? - - 80 95 - - - - 80 93 - - db db interchannel gain mismatch - 0.1 0.25 - 0.1 0.25 db output offset voltage dac to hpout - 2 5 - 2 5 mv gain drift - 100 - - 100 - ppm/c ac-load resistance (r l ) (note 8) 16 - - 16 - - ? load capacitance (c l ) (note 8) - - 150 - - 150 pf output impedance - 300 - - 300 - m ?
20 ds880f4 CS4207 8. see figure 5 and figure 6 . r l and c l reflect the recommended minimum resistance and maximum ca- pacitance required for the internal op -amp's stability and signal integrity. va, va_ref = 5.0 v (differential/single-ended) va, va_ref = 3.3 v (differential/single-ended) parameter (note 4) min typ max min typ max unit dac2/dac3; r l = 10 k ? dynamic range 18 to 24-bit a-weighted unweighted 16-bit a-weighted unweighted 104/100 101/97 - - 110/106 107/103 96 93 - - - - 101/97 98/94 - - 107/103 104/100 96 93 - - - - db db db db total harmonic distortion + noise 18 to 24-bit 0 db -20 db -60 db 16-bit 0 db -20 db -60 db - - - - - - -94/-91 -87/-83 -47/-43 -92 -73 -33 -88/-85 -81/-77 -41/-37 - - - - - - - - - -96/-94 -84/-80 -44/-40 -92 -73 -33 -88/-88 -78/-74 -38/-34 - - - db db db db db db other characteristics for dac2/dac3; r l = 10 k ? full-scale output voltage 1.60?va/ 0.80?va 1.68?va/ 0.84?va 1.76?va/ 0.88?va 1.60?va/ 0.80?va 1.68?va/ 0.84?va 1.76?va/ 0.88?va vpp interchannel isolation (1 khz) - 100 - - 100 - db interchannel gain mismatch - 0.1 0.25 - 0.1 0.25 db gain drift - 100 - - 100 - ppm/c ac-load resistance (r l ) (note 8) 3- -3- -k ? load capacitance (c l ) (note 8) --100--100pf output impedance - 100 - - 100 - ? agnd r l c l 0.1 ? f 33 ? hpout_l/r agnd r l c l lineout_l/r figure 5. output test load, headphone out figure 6. output test load, line out
ds880f4 21 CS4207 combined dac interpol ation & on-chip anal og filter response 9. measurement bandwidth is from stopband to 100 khz. dc electrical characteristics (agnd = 0 v; all voltages with respect to ground.) 10. the dc current draw represents the allowed current draw from the vcom pin due to typical leakage through electrolytic de-coupling capacitors. 11. valid with the recommended capacitor values on vbias. increasi ng the capacitanc e will also increase the psrr. parameter min typ max unit frequency response 10 hz to 20 khz -0.01 - +0.01 db passband to -0.01 db corner to -3 db corner 0 0 - - 21792 23952 hz hz stopband - 26256 - hz stopband attenuation (note 9) - 102 - db total group delay - 0.196 - ms parameters min typ max units vcom characteristics nominal voltage output impedance dc current source/sink (note 10) - - - 0.5?va 23 - - - 10 v k? ? a vhp_filt+ characteristics nominal voltage - 0.5?va_hp - v vhp_filt- characteristics nominal voltage - -0.5?va_hp - v mic bias characteristics nominal voltage vrefe = 000b vrefe = 001b vrefe = 010b vrefe = 100b dc current source (va=5.0v) (va=3.3v) - - - - - - hi-z 0.5?va gnd 0.8?va 5 3 - - - - - - v v v v ma ma power supply rejection ratio (psrr) (note 11) 1 khz - 60 - db
22 ds880f4 CS4207 digital microphone in terface characteristics test conditions: inputs: logic 0 = gnd = 0 v, logic 1 = vl_if; t a = +25 ?c; c load = 30 pf. notes: 12. the output clock frequency will follow the bit clock (b itclk) frequency divided by 8 or 12, depending on the sample rate of the adc. any deviation of the bi t clock source from the no minal supported rates will be directly imparted to the output clock rate by the same factor (e.g. +100 ppm offset in the frequency of bit- clk will become a +100 ppm offset in dmic_scl). for the nominal value of t_cyc refere nce hda024-a (see note 4 in ?references? on page 147 ). 13. rise and fall times are measured from 0.1 ? vl_if to 0.9 ? vl_if. figure 7. digital mic interface timing parameters symbol min typ max units dmic_scl period (fs adc >= 44.1 khz) (note 12) t p - 8 ? t_cyc - ns dmic_scl period (fs adc <= 32.0 khz) (note 12) t p - 12 ? t_cyc - ns dmic_scl duty cycle - 45 - 55 % dmic_scl rise time (note 13) t r - - 10 ns dmic_scl fall time (note 13) t f - - 10 ns dmic_sda setup time before dmic_scl rising edge t s(sd-clkr) 40 - - ns dmic_sda hold time after dmic_scl rising edge t h(clkr-sd) 5- -n s dmic_sda setup time before dmic_scl falling edge t s(sd-clkf) 40 - - ns dmic_sda hold time after dmic_scl falling edge t h(clkf-sd) 6- -n s dmic_scl dmic_sda t h(clkr-sd) t p t r t f t h(clkf-sd) t s(sd-clkr) t s(sd-clkf) right (b, data2) channel data left (a, data1) channel data left (a, data1) channel data
ds880f4 23 CS4207 digital interface specifications & characteristics 14. see ?digital i/o pin char acteristics? on p 10 for hd audio i/f and control power rails. hd audio bus specificatio ns & characteristics s/pdif transmitter/receiver specifications & characteristics parameters (note 14) symbol min max units input leakage current i in - 1 0 ? a input pin capacitance c in -7 . 5p f vl_hd = 1.5 v high-level input voltage v ih 0.60?vl_hd - v low-level input voltage v il - 0.40?vl_hd v high-level output voltage (i out = -500 ? a) v oh 0.90?vl_hd - v low-level output voltage (i out = 1500 ? a) v ol - 0.10?vl_hd v vl_hd = 3.3 v high-level input voltage v ih 0.65?vl_hd - v low-level input voltage v il - 0.35?vl_hd v high-level output voltage (i out = -500 ? a) v oh 0.90?vl_hd - v low-level output voltage (i out = 1500 ? a) v ol - 0.10?vl_hd v vl_if = 3.3 v high-level input voltage v ih 0.65?vl_if - v low-level input voltage v il -0.35?vl_ifv high-level output voltage (i oh = -100 ? a) v oh vl_if - 0.2 - v low-level output voltage (i ol = 100 ? a) v ol -0 . 2v parameter symbol min typ max units bitclk period t cyc 41.163 41.67 42.171 ns bitclk high time t high 17.50 24.16 ns bitclk low time t low 17.50 24.16 ns bitclk jitter 150 500 ps sdi valid after bitclk rising t tco 31 1n s sdo setup time t su 5n s sdo hold time t h 5n s parameter symbol min typ max units transmitter spec ifications & characteristics aes3 transmitter output jitter t jit(rms) meets iec 60958-3 ps receiver specifications & characteristics pll clock recovery sample rate range f rec khz input jitter tolerance t jit(rms) meets iec 60958-3 ps
24 ds880f4 CS4207 power consumption (this table represents the power consumption for i ndividual circuit blocks within the codec) (see (note 15) ) 15. unless otherwise noted, test cond itions are as follows: all zeros inpu t, sample rate = 48 khz; no load. 16. reset# held hi, all hda bus clocks and data lines are running; hd a interface running with support for unsolicited responses; all converters are in d3 state. 17. full-scale single-ended output signal into a 10 k ? load. 18. full-scale differential output signal into a 10 k ? load. (the following table demonstrates the total power consumption for typical system operation. these total codec power numbers are derived from the individual block pow er consumption numbers in the previous table.) typical current (ma) individual block operation va/ va_hp i va i va_hp i vd vd =1.8v i vl_hd vl_hd =3.3v i vl_if vl_if =3.3v total power for individual block (mw) 1 codec d3 state- unsolicited response capable (note 16) 3.3 0.94 0.00 3.34 0.07 0.00 9.35 5.0 1.20 0.00 12.24 2 adc1 or adc2 with pga oper- ation and pseudo-diff inputs 3.3 5.47 0.00 7.27 0.17 0.00 31.70 5.0 6.23 0.00 44.80 3 dac1 with headphone/line out (note 17) 3.3 11.08 1.51 8.79 0.06 0.00 57.57 5.0 14.06 1.76 95.12 4 dac2 or dac3 with differen- tial line out (note 18) 3.3 10.72 0.00 8.72 0.06 0.00 51.27 5.0 13.59 0.00 83.84 5 s/pdif transmitter with src function 3.3 0.84 0.00 8.90 0.07 0.23 19.78 5.0 1.10 0.00 22.51 6 s/pdif receiver with src function 3.3 0.84 0.00 12.67 0.10 0.00 25.91 5.0 1.10 0.00 28.64 typical codec operation power states adc1 adc2 dac1 dac2 dac3 s/pdif_out s/pdif_in va/ va_hp active blocks total codec power (mw) 1 stereo record from line in 1 (pga/adc1) d0 d3 d3 d3 d3 d3 d3 3.3 hda interface + unsolicited response + adc1 41.04 5.0 57.04 2 stereo playback to head- phone (no load) d3 d3 d0 d3 d3 d3 d3 3.3 hda interface + unsolicited response + dac1 66.91 5.0 107.36 3 stereo playback to head- phone out and s/pdif out d3 d3 d0 d3 d3 d0 d3 3.3 hda interface + unsolicited response + dac1+ s/pdif out 86.69 5.0 129.87 4 receive from s/pdif and playback to s/pdif out d3 d3 d3 d3 d3 d0 d0 3.3 hda interface + unsolicited response + s/pdif in/out 55.04 5.0 63.39 5 stereo record & playback line in 1 / line out 1 d0 d3 d3 d0 d3 d3 d3 3.3 hda interface + unsolicited response + adc1 + dac2 92.31 5.0 140.88
ds880f4 25 CS4207 4. codec reset and initialization 4.1 link reset a link reset is a system controller generated assertion of the hd audio bus reset# signal. a link reset will cause some of the hd audio bus interface logic to be initialized. following a link reset, the CS4207 will perform the codec initialization request sequence. many of the codec settin gs will remain unchanged following a link reset. see ?register settings across reset conditions? section on page 29 for more de- tails. when the codec has detected a link reset condition, all converter wid gets and pin widgets will transition to a low power operating mode, if prev iously in d0. the actual power st ates reported w ill remain unchanged, i.e. if in d0 or d3 prior to link reset, the widget stays in d0 or d3. if enabled, presence detection will con- tinue to sense any impedance changes and issue a power state change request to the link prior to asserting an unsolicited response. 4.2 function group reset because the CS4207 supports the extended power state support (epss ), a single occurrence of the func- tion group reset command will not cause the audio function unit and all associated widgets to initialize to the power-on reset values (as described in the hd audio specification, rev. 1.0). when the CS4207 re- ceives a single function group rese t verb, the codec will issue a response to the verb to acknowledge re- ceipt, and reset each input/output converter widget?s stream number and lowest channel number to the default (0h). no other settings are modified. see ?register settings across reset conditions? section on page 29 for more details. the CS4207 will respond to the newl y created ?double function group reset? (as defined in hda015-b, march 1, 2007) and will reset most of the register settings to their power on defaults. this ?double function group reset? will not affect the hd audio bus interface logic or th e unique codec physical address, which must be reset wi th the link reset# signal. therefore, the codec will not initiate a codec initialization se- quence on the link. in addition, th e configuration default settings will not be reset with a ?double function group reset?. this new reset condition is created by sending two function group resets back to back. the ?double func- tion group reset? is defined as two (2) function gr oup reset verbs received witho ut any other intervening verbs. the function group reset verbs are not required to be received in sequential frames, but there must not be any other verbs received in frames between the receipt of the function group reset verbs. there are no implied time outs between the time the first function group reset is received and the second func- tion group reset verb. 4.3 codec initialization immediately following the completion of a link reset sequence, the CS4207 will initiate a codec initialization sequence. the purpose of this initialization sequence is to acquire a unique address by which the codec can thereafter be referenced with commands on the sd o signal. during this sequence, the controller pro- vides the codec with a unique address using its attached sdi signal. if the CS4207 codec is in a low power d3 state and enabled to support a presence detect event, it will retain its unique address while in that lo w power state. if reset# is de-assert ed high, and bitc lk and sync are running at the time of a pres ence detect event, the codec will signal an unsolicited response. when put into the d3 low power state and enabled to support a presence detect event, with the link in the reset state (reset# is asserted low), the cs 4207 will post the occurrence of a wake event and request a power state change by signaling a power state change reques t and initialization requ est. it will reestablish the connection with the controller by performing a ?codec initialization request?.
26 ds880f4 CS4207 if reset# is asserted low, and bitclk and sync are not running at the time (defined as link low power state), the codec will signal the powe r state change requ est and initializat ion request asynch ronously by as- serting sdi high continuously until it detects the de -assertion of reset#. it will then asynchronously drive sdi low with the de-assertion of th e reset#. with the reset# signal hi gh, the codec will reestablish the connection with the controller by perfor ming a ?codec initialization request?. 4.4 d3 lower powe r state support the d3 low power state allows for, but does not require, the lowest possible power consuming state under software control, in which extended power states supported ( epss) requirements ca n be met. while in the d3 state, the CS4207 will retain sufficient operatio nal capability to properly respond to subsequent soft- ware get/set power state commands (verb id=f05h/705h) to the audio function group (node id = 01h). in addition, while in the d3 power state, link reset and ?double function group? reset are supported. all other get/set commands will be ig nored while the codec is in the d3 power state. widgets reporting an epss of ?1?b will transition fr om d3 state to d0 state in less than 10 ms. this interval is measured from the response to the set power state verb that caused the transition from d3 back to fully operational d0 state. it is permissible for the audio fidelity for analog output s to be slightly degraded if audio playback begins im- mediately once the fully operational state is entered. however, audio fidelity will no t be degraded 75ms after the transitioning to d0 state. 4.5 extended power st ates supported (epss) epss indicates that the audio function group or a particular widget supports additio nal capabilities allow- ing better low power operation. the cs42 07 will report epss support at th e function group level and will enable low power operation for all input and output converter widgets, and the following pin widgets which are capable of reporting presence detection: ? headphone pin widget (node id 09h) ? line out 1 pin widget (node id 0ah) ? line in 1/mic in 2 pin widget (node id 0ch) ? mic in 1/line in 2 pin widget (node id 0dh) ? s/pdif receiver input pi n widget (node id 0fh). the following requirements will also be implemented by each input/output converter widget and the above listed pin widgets: ? report powercntrl set to ?1?b and support the supported power states verb. ? jack presence state change reporting (when enabled) will operate rega rdless of the widget and audio function group power state. ? reporting of presence state change and issuing system wake when the link clock (bitclk) is not oper- ational is supported. ? the s/pdif receiver to s/pdif transmitter digital loop-through (no clock re-timing) will continue to op- erate (if enabled) even though any one, or all of the s/pdif receiver input converter widget, s/pdif transmitter output converter widget or s/pdif receiv er input pin widget enters into low power states. this digital loop-through will also continue to operate if the audio function group is placed in the d3 low power state, during a link reset, and even if the hd audio bitclk is stopped. ? dependencies between converter widgets and associ ated pin widgets will not cause unexpected results when one node of the dependency is placed into d3 state. the diagrams and tables below demonstrate typical audio streams.
ds880f4 27 CS4207 . output path output pin widget d0 output pin widget d3 output converter widget d0 ? normal operation in d0 ? converter widget continues to accept audio samples from the hd audio bus. ? pin widget outputs a muted audio signal, supports pres- ence detect if enabled and transitions to d3. output converter widget d3 ? converter widget stops ac- cepting audio samples from the hd audio bus, sends mute to the pin widget and transi- tions to d3. ? pin widget outputs a muted audio signal and supports presence detect if enabled. remains in d0 state. ? converter and pin widgets are in low power d3 state. supports presence detect if enabled. input path input pin widget d0 input pin widget d3 input converter widget d0 ? normal operation in d0 ? converter widget will send ?muted? audio samples to the hd audio bus. remains in d0 state. ? pin widget outputs a muted audio signal, supports pres- ence detect if enabled and transitions to d3. input converter widget d3 ? converter widget stops send- ing audio samples to the hd audio bus and transitions to d3. ? pin widget shuts down and supports presence detect if enabled. remains in d0 state. ? converter and pin widgets are in low power d3 state. supports presence detect if enabled. lineout output pin widget d0/d3 power states dac output converter widget d0/d3 power states hd_audio bus line in input pin widget d0/d3 power states adc input converter widget d0/d3 power states
28 ds880f4 CS4207 4.6 power state settings reset (ps-settingsreset) ps-settingsreset is reported as set to one ?1?b when, during any low power state transition the settings that were changed from the defaults (either through softwa re or hardware) have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. the conditions that may reset set- tings to their defaults are: 1. power on; always sets the ps-settings reset to ?1?b for all widgets that report epss set to ?1?b and that have host programmable settings and reset all settings. 2. double function grou p reset: sets ps-settingsrese t to ?1?b for all widgets that report epss set to one ?1?b and that have host programmable settings and resets all settings. single function group reset, link reset or bitclk stopped will not c ause the ps-settingsreset bit to be set to ?1?b. all settings will persist across these events. the ps-settingsreset will be re ported at the individual widget level and at the audio fu nction group level. the ps-settingsreset bit for the audio function group is handled differently than at the widget level. for the audio function group the ps-settingsreset bit is se t to ?1?b when any widget sets its ps-settingsreset to ?1?b. the audio function group?s ps-settingsreset bit is the logical ?or? of all the ps-settingsreset bits, but is latched so that it can be reset independently and not require all the individual widget ps-settingsreset bits be reset. this allows a simple poll by the host software to detect when some settings have been re- set/changed. for widge ts that do not support the epss bit, repo rting ps-settingsreset is not required. if the ps-settingsreset bit is set to ?1 ?b, then this bit for individual widgets will be cleared to ?0?b on receipt of any ?set? verb to that widget; or after responding to a ?get? power state verb to that widget. bit settings within converters and pin widgets that so ftware changed from their defaults will no t be changed by hardware across any dx state transition, si ngle function group resets or link resets. table 1 on page 29 outlines how the handling of setting persistence should be performed across dx states, clock stopping and resets. because the CS4207 supports epss, the us e of ps-settingsreset to repo rt that settin gs have been reset (changed) is required. d clr q q clk ?1?b power on reset or double function group reset get ?power state? verb function group ps_settings reset bit figure 8. ps-settings reset behavior
ds880f4 29 CS4207 4.7 register settings across resets the CS4207 will perform a complete po wer on reset (por) initialization if the voltage is cycled from off to on from the vd pin of the device. all registers will be initialized to the defa ult state. for device behavior due to other system reset conditions or power st ate transitions events, see the table below. setting action with link reset action with double function group reset action with single function group reset action across d0/d3 state transitions or link bitclk stopped unique codec physi- cal address (sdi) requires codec initial- ization sequence to acquire new unique address. persist across ?double? fg reset. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. converter format; type, base, mult, div, bits chan fields (verb id = a00/2xx) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. amplifier gain/mute (verb id = bxx/3xx) index, mute and gain settings persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. index, mute and gain settings persist across ?single? fg reset. index, mute and gain settings persist across dx state transitions or bitclk stopped. connection select control (verb id = f01/701) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. power states for the function group and individual widgets (verb id = f05/705) power state persist across link reset. power state persist across ?double? fg reset. power state persist across ?single? fg reset. persist across bit- clk stopped. ps-act and ps-set will be updated to the cur- rent power state across dx state transi- tions. converter stream & channel settings e.g. stream number and lowest channel number (verb id = f06/706) reset to default by link reset and does not set ps-setting- sreset to ?1?b. reset to default by ?double? fg reset and does not set ps-set- tingsreset to ?1?b. reset to default by ?single? fg reset and does not set ps-set- tingsreset to ?1?b. reset to default across dx state transi- tions and does not set ps-settingsreset to ?1?b. pin widget controls; in/out enables, vref (verb id = f07/707) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. unsolicited response control; enable and tag (verb id = f08/708) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. table 1. register settings across reset conditions
30 ds880f4 CS4207 pin sense; presence detect bit only. (verb id = f09/709) update to reflect proper state and save any unsolicited response that has not been sent and send it after first verb is received. update to reflect proper state and issue an unsolicited response if enabled. update to reflect proper state and issue an unsolicited response if enabled. update to reflect proper state after tran- sition back to full operation (d0). eapd/btl enable; btl (verb id = f0c/70c) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. s/pdif digital con- verter controls 1 & 2 (verb id = f0d/70d- 70e) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. gpi/gpo data, enable mask, sticky masks, direction (verb id = f15- f1a/715-71a) persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. configuration default; all 32 bits (verb id = f1c/71c- 71f) persist across link reset. persist across ?dou- ble? fg reset. persist across ?sin- gle? fg reset. persist across dx state transitions or bitclk stopped. sub-system id (verb id = f20/720- 723) persist across link reset. persist across ?dou- ble? fg reset. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. coefficient index (verb id = d/5) persist across link reset. settings are reset to por default value. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. processing coefficient (verb id = c/4) persist across link reset. settings are reset to por default value. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. coefficient registers persist across link reset. settings are reset to por default value. ps-settingsreset set to ?1?b. persist across ?single? fg reset. persist across dx state transitions or bitclk stopped. digital loop from s/pdif receiver pin widget to s/pdif transmitter pin wid- get digital loop persists if enabled. digital loop persists if enabled. digital loop persists if enabled. digital loop persists if enabled. setting action with link reset action with double function group reset action with single function group reset action across d0/d3 state transitions or link bitclk stopped table 1. register settings across reset conditions
ds880f4 31 CS4207 5. presence detection 5.1 jack detection circuit the jack detection circuit provides at tachment for to up to four pluggable jacks as described in the high def- inition audio specification. each jack has an isolated switch (normally open), as shown in figure 9 , which closes when a plug is inserted into that jack. a ?power of two? parallel resistor network is connected to the sense_a pin as shown. the codec will measure the impedance of this network to determine which jacks have plugs inserted and set (or clear) the corresponding ?p resence detect? bit in the ?pin sense? control for that pin widget. the jack detect circuitry will re move switch bounce of up to 250-ms duration. 5.1.1 presence detection and unsolicited response the pin widget, if enabled to gen erate an unsolicited response, will deliver one such response for each ?de-bounced? state change of the ?presence detect? bit. the ?pres ence detect? bit will be stable and read- able at the time an unsolicited response is issued. in sensing the insertion or removal of a jack the codec will measure the impedance continuous ly to determine when to report a change of state. reporting of state change and change in the pr esence detect state bits will not oc cur until any impedance change has initially stabilized for ap proximately 250ms. following this de-b ounce period, the codec will report an un- solicited response, if e nabled and the hd audio bitclk running, within 10ms. if the hd audio bitclk is not running, then the re quest to wake the link will occur within 10ms. once an unplug or plug event has been signaled to the host via the unsolicited response, another change of the presence detection bits will not be generated unless the jack st ate has been sensed (de-bounced) continuously for at least 250ms. pin widgets programmed to generate unsolicited responses for presence de tection state changes will continue to function in all power states. when g enerating an unsolicited response for a plug event when the link is in a low power state (when reset# is as serted low), sending of an unsolicited response will wait until after the power state ch ange and initialization request and th e codec initialization sequence are complete and the first verb is received to prevent t he response from being lost due to software transition to active power state. headphone out left & right 39.2 k ? +/- 1% nc to codec to codec mic in left & right nc to codec to codec line in left & right nc to codec to codec line out 1 left & right nc to codec to codec 20.0 k ? +/- 1% 10.0 k ? +/- 1% 5.1 k ? +/- 1% to sense_a 2.67 k ? +/- 1% va figure 9. jack presence detect circuit
32 ds880f4 CS4207 if the codec has detected that the link is entering a link reset state (see descrip tion below), all unsolicited response requests will be buffered. once the link is in t he link reset state, wit h reset# asserted low, the codec will request a powe r state change and initialization requ est. following the codec initialization cycle where a unique address is prov ided to the CS4207, the codec will th en wait for the first verb to be received before issuing th e unsolicited response to prevent the re sponse from being lost due to software transition to active power state. the link reset entry sequence is defined as follows: 1. the hd audio bus controller synchronously completes the current frame but does not signal frame sync (sync) during the last eight sdo bit times. 2. the hd audio bus controller synchr onously asserts reset# four (or more) bitclk cy cles after the completion of the current frame. 3. bitclk is stopped a minimum of four clocks, four rising edge s, after the asse rtion of reset#. in the event of a system bus (p ci bus) reset, the above sequence does not complete, and reset# is asynchronously asserted immediately and unconditionally. when the codec returns to d0 from the d3 lower power state, the state of the presence detection bits will be correct. if the codec power has been removed, th e state of the presence de tection bits will be reset to the default value and the codec will not report this by setting the ps-settingsreset bit for the affected pin widget(s). (hda015-b, march 1, 2007 says that the ps-settingsreset bit will be set for the affected pin widget). 5.1.2 s/pdif receive r presence detect the presence detect scheme for the s/pdif receiver will use the logic state transition of the ?lock? or ?unlock? indicator for the incoming digital stream. the ?lock? and ?unlock? indicators are sticky bits (edge-triggered) which indicate the current state of the receiver. these bits are located in the vendor pro- cessing widget, see ?s/pdif rx/tx interface stat us (cir = 0000h)? on p 129 . when the s/pdif receiver input converter widget is ?enabled? and the ?lock? indi cator is a ?1?, then the presence detect bit in the pin sense register will be set to ?1 ?. the s/pdif in converter widget (nid=07h) and the s/pdif receiver pin widget (nid=0fh) must be in the d0 state to support presence detect using this method described. with an incoming valid s/pdif signal applied to the spdif_in pin, the ?lock? status will be valid approx- imately 200 s/pdif frames following the receiver being enabled.
ds880f4 33 CS4207 6. hd audio codec supporte d verbs and responses 6.1 software programming model figure 10. software programming model headphone single-ended jack detect a d0/d3 power states dac1 pcm; vol/mute; d0/d3 power states 02h hd_audio bus line out 1 se/balanced jack detect d d0/d3 power states dac2 pcm; vol/mute; d0/d3 power states 03h 09h 0ah line out 2 se/balanced (speaker) dac3 pcm; vol/mute; d0/d3 power states 04h 0bh line in 1/mic in 2 se/pseudo-diff; boost jack detect c d0/d3 power states adc1 pcm; vol/mute; d0/d3 power states 05h 0ch mic in 1/line in 2 se/psd/bal; boost vref; jack detect b d0/d3 power states adc2 pcm; vol/mute; d0/d3 power states 06h 0dh digital mic in 1 boost 0eh s/pdif receiver lock/unlock detect d0/d3 power states s/pdif in pcm/non-pcm; d0/d3 power states 07h 0fh s/pdif transmitter 1 s/pdif out 1 pcm/non-pcm; d0/d3 power states 08h 10h gpio 01h jack sense processing widget 11h digital mic in 2 boost 12h beep generator 13h s/pdif transmitter 2 s/pdif out 2 pcm/non-pcm; d0/d3 power states 14h 15h
34 ds880f4 CS4207 6.1.1 node id summary node id description reference section 00h root node section 6.2 on page 36 01h audio function group section 6.3 on page 37 02h dac1 output converter widget section 6.4 on page 45 03h dac2 output converter widget section 6.4 on page 45 04h dac3 output converter widget section 6.4 on page 45 05h adc1 input converter widget section 6.5 on page 53 06h adc2 input converter widget section 6.5 on page 53 07h s/pdif receiver input converter widget section 6.6 on page 63 08h s/pdif transmitter 1 output converter widget section 6.7 on page 70 09h headphone pin widget section 6.8 on page 78 0ah line out 1 pin widget section 6.9 on page 85 0bh line out 2 pin widget section 6.10 on page 92 0ch line in 1/mic in 2 pin widget section 6.11 on page 97 0dh mic in 1/line in 2 pin widget section 6.11 on page 97 0eh digital mic 1 in pin widget section 6.12 on page 108 0fh s/pdif receiver input pin widget section 6.13 on page 114 10h s/pdif transmitter 1 output pin widget section 6.14 on page 120 11h processing widget section 6.15 on page 126 12h digital mic 2 in pin widget section 6.12 on page 108 13h beep generator widget section 6.16 on page 136 14h s/pdif transmitter 2 output converter widget section 6.7 on page 70 15h s/pdif transmitter 2 output pin widget section 6.14 on page 120 table 2. device node id summary
ds880f4 35 CS4207 6.1.2 pin configuratio n register defaults the configuration default register is required for each pin widget. it is used by software as an aid in de- termining the configuration of jacks and devices attach ed to the codec. at the time the codec is first pow- ered on, this register is internally loaded with default values, see table 3 , indicating the typical system use of this particular pin/jack. after this initial loading, th e state, including any softwar e writes into the register, will be preserved across reset events. its state need not be preserved across power level changes. port location device type color misc assoc. sequence headphone node id = 09h (see p83 ) jack external/ front headphone 1/8? jack green no pdc override f 0 line out 1 node id = 0ah (see p91 ) jack external/ rear line out 1/8? jack green no pdc override f 0 line out 2 node id = 0bh (see p96 ) fixed internal speakers other analog unknown no pdc override f 0 line in 1/mic in 2 node id = 0ch (see p104 ) jack external/ rear line in 1/8? jack blue no pdc override 5 1 mic in 1/line in 2 node id = 0dh (see p105 ) jack external/ rear mic in 1/8? jack pink no pdc override 3 1 digital mic in 1 node id = 0eh (see p110 ) fixed other/ mobile lid inside digital in other digital unknown no pdc override 3 e s/pdif in node id = 0fh (see p119 ) jack external/ front s/pdif in rca jack white no pdc override f 0 s/pdif out 1 node id = 10h (see p124 ) jack external/ rear s/pdif out rca jack orange no pdc override f 0 digital mic in 2 node id = 12h (see p111 ) fixed other/ mobile lid inside digital in other digital unknown no pdc override 5 e s/pdif out 2 node id = 15h (see p125 ) jack external/ rear s/pdif out optical jack black no pdc override f 0 table 3. pin configuration register defaults
36 ds880f4 CS4207 6.2 root node (node id = 00h) 6.2.1 vendor and device id get parameter command format: response format: 6.2.2 revision id get parameter command format: response format: 6.2.3 subordinate node count get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 00h verb id = f00h parameter id = 00h bits type default description 31:16 read only 1013h vendor id (vid): cirrus logic pci vendor id 15:0 read only 4207h device id (did): CS4207 device id bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 00h verb id = f00h parameter id = 02h bits type default description 31:24 read only 00h reserved 23:20 read only 1h major revision (majrev) of the hda spec 19:16 read only 0h minor revision (minrev) of the hda spec 15:8 read only 03h revision id (revid): this indicates the letter rev used for all-layer changes. 01h - rev. ax 02h - rev. bx 03h - rev. cx 7:0 read only 02h stepping id (sid): this indicates the number rev used for metal layer changes. 00h - rev. a0 or rev. b0 or rev. c0 01h - rev. a1 or rev. c1 02h - rev. c2 bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 00h verb id = f00h parameter id = 04h bits type default description 31:24 read only 00h reserved 23:16 read only 01h starting node number (snn): 1 15:8 read only 00h reserved 7:0 read only 01h total number of nodes (tnn): 1
ds880f4 37 CS4207 6.3 audio function gro up (node id = 01h) 6.3.1 subordinate node count get parameter command format: response format: 6.3.2 function group type get parameter command format: response format: 6.3.3 audio function group capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 04h bits type default description 31:24 read only 00h reserved 23:16 read only 02h starting node number (snn): 2 15:8 read only 00h reserved 7:0 read only 14h total number of nodes (tnn): 20 bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 05h bits type default description 31:9 read only 0 reserved 8 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 7:0 read only 01h node type (nt): audio function group bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 08h bits type default description 31:17 read only 0 reserved 16 read only 1b beep gen: beep generator is present. 15:12 read only 0h reserved 11:8 read only 9h input delay: represents the number of samples between when the sample is received as an ana- log signal at the pin and when the digital repre- sentation is transmitted on the high definition audio link. this may be a ?typical? value. 7:4 read only 0h reserved 3:0 read only eh output delay: represents the number of sam- ples between when the sample is received from the link and when it appears as an analog signal at the pin. this may be a ?typical? value.
38 ds880f4 CS4207 6.3.4 supported pcm size, rates get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 0ah bits type default description 31:21 read only 00000000000b reserved 20 read only 1b 32-bit (32b): 32-bit audio format is supported. 19 read only 1b 24-bit (24b): 24-bit audio format is supported. 18 read only 1b 20-bit (20b): 20-bit audio format is supported. 17 read only 1b 16-bit (16b): 16-bit audio format is supported. 16 read only 0b 8-bit (8b): 8-bit audio format is not supported. 15:12 read only 0h reserved 11 read only 0b rate-12 (r12): 384 khz (48*8) rate is not sup- ported. 10 read only 1b rate-11 (r11): 192.0 khz (48*4) rate is sup- ported. 9 read only 1b rate-10 (r10): 176.4 khz (44.1*4) rate is sup- ported. 8 read only 1b rate-9 (r9): 96.0 khz (48*2) rate is supported. 7 read only 1b rate-8 (r8): 88.2 khz (44.1*2) rate is supported. 6 read only 1b rate-7 (r7): 48.0 khz rate is supported. 5 read only 1b rate-6 (r6): 44.1 khz rate is supported. 4 read only 1b rate-5 (r5): 32.0 khz (48*2/3) rate is supported. 3 read only 0b rate-4 (r4): 22.05 khz (44.1/2) rate is not sup- ported. 2 read only 0b rate-3 (r3): 16.0 khz (48/3) rate is not sup- ported 1 read only 0b rate-2 (r2): 11.025 khz (44.1/4) rate is not sup- ported. 0 read only 0b rate-1 (r1): 8.0 khz (48/6) rate is not sup- ported.
ds880f4 39 CS4207 6.3.5 supported stream formats get parameter command format: response format: 6.3.6 supported power states get parameter command format: response format: clkstop is defined only at the function group only (not at the widget level) and indicates that the func- tion group and all widgets under it support d3 operat ion even when there is no bitclk present on the link. the maximum exit time back to fully functional is 10 m illiseconds from the time that the clock begins operation and a codec address cycl e has been completed. the clkstop capability ext ends the required functionality for d3 support while the link is operational to include: ? reporting of presence detect state changes, if enable d and supported by the pin widget, even if the link clock is not running (c ontroller low power state) or is currently in a link reset condition. ? presence state changes oc curring during link reset will be deferred until after the reset sequence has completed. presence state change unsolicited responses, if enabled, will not be lost because the link clock stops or if link resets are generated befor e the unsolicited response for the state change has been returned to the host. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 0bh bits type default description 31:3 read only 0 reserved 2 read only 0b ac-3 (ac3): ac-3? data is not supported. 1 read only 0b float32 (flt32): float32 formatted data is not supported on this widget. 0 read only 1b pulse code modulation (pcm): pcm formatted data is supported on this widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: function group supports extended power states. 30 read only 1b clkstop: function group supports d3 opera- tion even if there is no bclk present on the link. 29 read only 0b s3d3coldsup: software should place the codec in d3hot state when the platform is entering s3 state. 28:5 read only 000000h reserved 4 read only 0b d3coldsup: d3cold operation is not supported. 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported.
40 ds880f4 CS4207 ? reporting of clkstopok when stoppi ng of the clock would be permitt ed. the clkstop is a static ca- pability with clkstopok a dynamic reporting. the setting the capability clkstop to one (1) and not al- lowing the clock to stop by not reporting clkstopok is not permissible. unless there is a condition or dependency that the host software cannot be made aware of, that would prohibit stopping the clock, the clkstopok shall be reported as set (1). it is expected that host soft ware will poll the clkstopok before stopping the clock if the clkstop is reported at one (1). 6.3.7 gpio capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f00h parameter id = 11h bits type default description 31 read only 0b gpiowake: does not support wake functionality. 30 read only 0b gpiounsol: does not support ur functionality. 29:24 read only 0h reserved 23:16 read only 0h numgpis: no dedicated gpi pins. 15:8 read only 0h numgpos: no dedicated gpo pins. 7:0 read only 4h numgpios: afg supports 4 gpio pins.
ds880f4 41 CS4207 6.3.8 power states get parameter command format: set parameter command format: response format: ps-set is a power state field which defines the current power setting of the referenced node. since this node is an audio function group node, the actual power state is this setting. setting this field to the d3 bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b following a por condition. for more information, see ?power state settings reset (ps-settingsreset)? on p 28 . 9 read only 1b power state clock stop ok (ps-clkstopok): this bit is set to a ?1?b when the codec is capable of continuing proper operation even when the hd audio bus bitclk has been stopped. this bit is valid for the audio function group node and not the device widgets. 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. the power state requested by software will always be possible following a reasonable time required to execute the power state transition. there are no dependencies unknown to software between nodes that would inhibit transitioning to the requested power state. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported
42 ds880f4 CS4207 state for the audio function group node will force a ll other nodes with power state control to the d3 state. if the power state field for this node is set to d0, th en the individual power st ate for each converter will be uniquely controlled via the corres ponding node power state field. ps-act is a power state field which indicates the actual power state of the referenced node. within the audio function gr oup node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). ps-clkstopok is reported as a ?1?b when the codec is capable of continuing proper operation in the ab- sence of the hd audio bus bitclk. this bit is report ed only at the audio function group level and is reserved at the widget level. after accepting a low po wer state transition reques t (d3 state) to the audio function group node, the codec will begin ramping down all the audio co nverters. during this time, the ps-clkstopok bit will be set to ?0?b to signify that the bus bitclk can not be stopped. once all the con- verters have been ramped down, the codec will update th e ps-act bits to reflect the actual transition to the d3 state and will then set the ps- clkstopok bit to a ?1?b to report the ability of the codec to operate correctly while in the low power stat e with the bitclk stopped. while in the low power d3 state, and with the bus bitclk stopped, the pin widgets of the codec which were enabled to support unsolicited respons- es will continue to operate. 6.3.9 gpio data get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f15h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 715h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read only 0h gpio[7:4] data: not supported. 3:0 read/write 0h gpio[3:0] data: for gpio programmed as inputs, this value is read only and is the sensed value on the corresponding pin. for gpio pro- grammed as outputs, the value written is driven onto the corresponding pin. note that if the corresponding bit in the gpio enable mask control is not set, pins configured as outputs will not drive the associated bit value (as the pin must be in a hi-z state), but the value returned on a read will still reflect the value that would be driven if the pin were to be enabled in the gpio enable mask control.
ds880f4 43 CS4207 6.3.10 gpio enable mask get parameter command format: set parameter command format: response format: 6.3.11 gpio direction get parameter command format: set parameter command format: response format: 6.3.12 gpio sticky mask get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f16h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 716h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read only 0h gpio[7:4] enable mask: not supported. 3:0 read/write 0h gpio[3:0] enable mask: if the bit associated with a pin is 0, the pin is disabled, and must be in a hi-z state. if the bit is a 1, the gpio pin is enabled and the pin?s behavior will be determined by the gpio direction control. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f17h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 717h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read only 0h gpio[7:4] direction: not supported. 3:0 read/write 0h gpio[3:0] direction: if a bit is a 0, the associ- ated gpio signal is configured as an input. if the bit is set to a 1, the associated gpio signal is configured as an output. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f1ah payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 71ah payload = xxh
44 ds880f4 CS4207 response format: 6.3.13 implementation identification this field provides the board implementation id and asse mbly id of the functional group to software. it is a read/write-once register; bios writes to this field to co nfigure the board implementation id and assembly id during the boot process. get parameter command format: set parameter command format: response format: 6.3.14 function reset function reset is an ?execute? verb. there is no physical register associated with the function reset. see ?function group reset? section on page 25 for more details. set parameter command format: bits type default description 31:8 read only 000000h reserved 7:4 read only 0h gpio[7:4] sticky mask: not supported. 3:0 read/write 0h gpio[3:0] sticky mask: defines gpio input type (0 = non-sticky, 1 = sticky) when a gpio pin is configured as an input. gpio inputs config- ured as sticky are cleared by writing a 0 to the corresponding bit of the gpio data control the default value for these bits (0h) is all pins non-sticky. non implemented gpio pins always return 0?s. sticky is defined as positive-edge sensitive, non-sticky as level sensitive. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = f20h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 720h payload = xxh (iid bits [7:0]) cad = x node id = 01h verb id = 721h payload = xxh (iid bits [15:8]) cad = x node id = 01h verb id = 722h payload = xxh (iid bits [23:16]) cad = x node id = 01h verb id = 723h payload = xxh (iid bits [31:24]) bits type default description 31:16 read/write once 1013h board manufacturer identification (bmid): contains the pci vendor id of the board manu- facturer. preset to cirrus logic?s pci vendor id. 15:8 read/write once 42h board sku (bsku): assigned by the board manufacturer to identify the specific board design. preset to 42h for cirrus logic codecs. 7:0 read/write once 07h assembly id (assyid): uniquely identifies the specific board assembly. preset to 07h for the CS4207. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 01h verb id = 7ffh payload = 00h
ds880f4 45 CS4207 6.4 dac1, dac2, dac3 output converte r widgets (node id = 02h, 03h, 04h) 6.4.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 0h type (typ): audio output converter widget 19:16 read only dh delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 0b connection list (cl): a connection list is not present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 1b format override (fo): this bit is a ?1? to indi- cate that the widget contains format information, and the ?supported formats? and ?supported pcm bits, rates? should be queried for the wid- get?s format capabilities. 3 read only 1b amplifier paramete r override (apo): this wid- get contains its own amplifier parameters. 2 read only 1b output amplifier present (oap): output ampli- fier is present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
46 ds880f4 CS4207 6.4.2 supported pcm size, rates get parameter command format: response format: 6.4.3 supported st ream formats get parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f00h pa rameter id = 0ah bits type default description 31:21 read only 00000000000b reserved 20 read only 1b 32-bit (32b): 32-bit audio format is supported. 19 read only 1b 24-bit (24b): 24-bit audio format is supported. 18 read only 1b 20-bit (20b): 20-bit audio format is supported. 17 read only 1b 16-bit (16b): 16-bit audio format is supported. 16 read only 0b 8-bit (8b): 8-bit audio format is not supported. 15:12 read only 0h reserved 11 read only 0b rate-12 (r12): 384 khz (48*8) rate is not sup- ported. 10 read only 1b rate-11 (r11): 192.0 khz (48*4) rate is sup- ported. 9 read only 1b rate-10 (r10): 176.4 khz (44.1*4) rate is sup- ported. 8 read only 1b rate-9 (r9): 96.0 khz (48*2) rate is supported. 7 read only 1b rate-8 (r8): 88.2 khz (44.1*2) rate is supported. 6 read only 1b rate-7 (r7): 48.0 khz rate is supported. 5 read only 1b rate-6 (r6): 44.1 khz rate is supported. 4 read only 1b rate-5 (r5): 32.0 khz (48*2/3) rate is supported. 3 read only 0b rate-4 (r4): 22.05 khz (44.1/2) rate is not sup- ported. 2 read only 0b rate-3 (r3): 16.0 khz (48/3) rate is not sup- ported 1 read only 0b rate-2 (r2): 11.025 khz (44.1/4) rate is not sup- ported. 0 read only 0b rate-1 (r1): 8.0 khz (48/6) rate is not sup- ported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f00h pa rameter id = 0bh
ds880f4 47 CS4207 response format: 6.4.4 supported power states get parameter command format: response format: 6.4.5 output amplifier capabilities get parameter command format: response format: bits type default description 31:3 read only 0 reserved 2 read only 0b ac-3 (ac3): ac-3 data is not supported. 1 read only 0b float32 (flt32): float32 formatted data is not supported on this widget. 0 read only 1b pulse code modulation (pcm): pcm formatted data is supported on this widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f00h parameter id = 12h bits type default description 31 read only 1b mute capable (mc): this widget supports mute. 30:23 read only 00000000b reserved 22:16 read only 0000001b step size (ss): indicates that the size of each amplifier?s step gain is 0.5 db. 15 read only 0b reserved 14:8 read only 1111111b number of steps (nos): indicates there are 128 gain steps; attenuation range is from +6 db to -57.5 db in 0.5 db steps. 7 read only 0b reserved 6:0 read only 1110011b offset (ofst): indicates that if ?1110011b? is programmed into the amplified gain control, it would result in a gain of 0 db.
48 ds880f4 CS4207 6.4.6 power states get parameter command format: set parameter command format: response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group no de, the actual power state is a function of both this setting and the powerstate setting of the audio fu nction group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of nod e, this field will be the lower power consuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see section 4.6 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see section 4.4 for more information. pss = ?0100?b; d4 - not supported
ds880f4 49 CS4207 6.4.7 converter stream, channel get parameter command format: set parameter command format: response format: 6.4.8 converter format get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = f06h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = 706h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read/write 0h stream number (sn): this field is written by software to indicate the stream number used by the output converter. ?0h? is stream 0, ?1h? is stream 1, etc. by convention, stream 0 is reserved and unused so that converter whose stream number has been reset to ?0h? does not unintentionally decode data not intended for them. 3:0 read/write 0h lowest channel number (lcn): this field is written by software to indicate the lowest channel used by the output converter. the stereo con- verter will use this lcn value plus 1 for its left and right channel. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = ah payload = 0000h bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = 2h payload = xxxxh
50 ds880f4 CS4207 response format: bits [15:0] must be programmed with the same value pr ogrammed into the stream descriptor, so that the data format being transmitted on the link matches what is expected by the consumer of the data. if the type is set to non-pcm, the controller pushes data ov er the link and is not concerned with format- ting. the base rate, data type, and number of words (mult) to send each valid frame are specified to control the rate at which the non-pcm data is sent. bits type default description 31:16 read only 0000h reserved 15 read/write 0b stream type (type): if type is non-zero, the other bits in the format structure have other meanings. 0: pcm 1: non-pcm 14 read/write 0b sample base rate (base): 0 = 48 khz 1 = 44.1 khz 13:11 read/write 000b sample base rate multiple (mult): 000 = 48 khz/44.1 khz or less 001 = x2 (96 khz, 88.2 khz, 32 khz) 010 = x3 (144 khz) 011 = x4 (192 khz, 176.4 khz) 100-111 = reserved 10:8 read/write 000b sample base rate divisor (div): 000 = divide by 1 (48 khz, 44.1 khz) 001 = divide by 2 (24 khz, 22.05 khz) 010 = divide by 3 (16 khz, 32 khz) 011 = divide by 4 (11.025 khz) 100 = divide by 5 (9.6 khz) 101 = divide by 6 (8 khz) 110 = divide by 7 111 = divide by 8 (6 khz) 7 read only 0b reserved 6:4 read/write 000b bits per sample (bits): bits in each sample: 000 = 8 bits. the data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. the data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = reserved 3:0 read/write 0000b number of channels (chan): number of chan- nels in each frame of the stream: 0000 = 1 0001 = 2 ? 1111 = 16
ds880f4 51 CS4207 6.4.9 amplifier gain/mute get parameter command format: bits [19:16] = ?bh?, where bi ts [15:0] are defined below: response format: set parameter command format: bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = bh payload = xxxxh bits [15:0] value description 15 1b get output/input (goi): this bit controls whether the request is for the input amplifier or the output amplifier. when ?1?, the output amplifier is being requested. when ?0?, the input amplifier is being requested. 14 0b ?0?b 13 xb get left/right (glr): this bit controls whether the request is for the left channel amplifier or the right channel amplifier. when ?1?, the left channel amplifier is being requested. when ?0?, the right channel ampli- fier is being requested. 12:4 000000000b reserved 3:0 0000b index (idx): this field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. it is only applicable if ?get output/input? is ?0? which indicates input amplifier is being requested. this field has no meaning and ignored since the widget does not have multiple input amplifiers. it should be always ?0?s. bits type default description 31:8 read only 000000h reserved 7 read only 1b amplifier mute (am): this bit returns the mute setting for the amplifier requested. a 1 indicates the amplifier is in the mute condition. if the ampli- fier requested does not exist, a ?0? will be returned. default equals muted. 6:0 read only 1110011b amplifier gain (ag): this field returns the gain setting for the amplifier requested. if the amplifier requested does not exist, all ?0?s will be returned default equals 0 db. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x dac1 node id=02h dac2 node id=03h dac3 node id=04h verb id = 3h payload = xxxxh
52 ds880f4 CS4207 bits [19:16] = ?3h?, where bits [15:0] are defined below: bits type default description 15 write only xb set output am plifier (soa): determines if the value programmed refers to the output amplifier. set to a 1 for the value to be accepted. 14 write only 0b set input amplifier (sia): determines if the value programmed refers to the input amplifier. this bit should always be ?0? since an input amplifier is not present on this widget. 13 write only xb set left amplifier (sla): selects the left chan- nel (channel 0). a 1 indicates that the relevant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 12 write only xb set right amplifier (sra): selects the right channel (channel 1). a 1 indicates that the rele- vant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 11:8 write only 0000b index (idx): this field is used when program- ming the input amplifiers on selector widgets and sum widgets. this field is ignored. 7 write only xb mute (mute): when ?1?, the mute is active. when ?0?, the mute is inactive. 6:0 write only xxxxxxxb gain (gain): specifies the amplifier gain in db.
ds880f4 53 CS4207 6.5 adc1, adc2 input converte r widgets (node id = 05h, 06h) 6.5.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 1h type (typ): audio input converter widget 19:16 read only 8h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 1b connection list (cl): a connection list is present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 1b format override (fo): this bit is a ?1? to indi- cate that the widget contains format information, and the ?supported formats? and ?supported pcm bits, rates? should be queried for the wid- get?s format capabilities. 3 read only 1b amplifier paramete r override (apo): this wid- get contains its own amplifier parameters. 2 read only 0b output amplifier present (oap): is ?0? as it is irrelevant to this audio input converter widget. 1 read only 1b input amplifier present (iap): input amplifier is present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
54 ds880f4 CS4207 6.5.2 supported pcm size, rates get parameter command format: response format: 6.5.3 supported st ream formats get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f00h pa rameter id = 0ah bits type default description 31:21 read only 00000000000b reserved 20 read only 1b 32-bit (32b): 32-bit audio format is supported. 19 read only 1b 24-bit (24b): 24-bit audio format is supported. 18 read only 1b 20-bit (20b): 20-bit audio format is supported. 17 read only 1b 16-bit (16b): 16-bit audio format is supported. 16 read only 0b 8-bit (8b): 8-bit audio format is not supported. 15:12 read only 0h reserved 11 read only 0b rate-12 (r12): 384 khz (48*8) rate is not sup- ported. 10 read only 0b rate-11 (r11): 192.0 khz (48*4) rate is not sup- ported. 9 read only 0b rate-10 (r10): 176.4 khz (44.1*4) rate is not supported. 8 read only 1b rate-9 (r9): 96.0 khz (48*2) rate is supported. 7 read only 1b rate-8 (r8): 88.2 khz (44.1*2) rate is supported. 6 read only 1b rate-7 (r7): 48.0 khz rate is supported. 5 read only 1b rate-6 (r6): 44.1 khz rate is supported. 4 read only 1b rate-5 (r5): 32.0 khz (48*2/3) rate is supported. 3 read only 0b rate-4 (r4): 22.05 khz (44.1/2) rate is not sup- ported. 2 read only 1b rate-3 (r3): 16.0 khz (48/3) rate is supported 1 read only 0b rate-2 (r2): 11.025 khz (44.1/4) rate is not sup- ported. 0 read only 1b rate-1 (r1): 8.0 khz (48/6) rate is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f00h pa rameter id = 0bh bits type default description 31:3 read only 0 reserved 2 read only 0b ac-3 (ac3): ac-3 data is not supported. 1 read only 0b float32 (flt32): float32 formatted data is not supported on this widget. 0 read only 1b pulse code modulation (pcm): pcm formatted data is supported on this widget.
ds880f4 55 CS4207 6.5.4 input amplifier capabilities get parameter command format: response format: 6.5.5 connection list length get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f00h parameter id = 0dh bits type default description 31 read only 1b mute capable (mc): supports muting. 30:23 read only 00000000b reserved 22:16 read only 0000011b step size (ss): indicates that the size of each amplifier?s step gain is 1.0 db. 15 read only 0b reserved 14:8 read only 0111111b number of steps (nos): there are 64 gain steps; gain range is from +12 db to -51 db in 1.0 db steps. if analog input pin widget is selected as input source, then the range of +12 db to -12 db is from analog pga and the range of -13 db to -51 db is digital volume control. if the digital mic input pin widget is selected as the input source, then the entire gain range from +12 db to -51 db is digital volume control. 7 read only 0b reserved 6:0 read only 0110011b offset (ofst): indicates that if ?0110011b? is pro- grammed into the amplified gain control, it would result in a gain of 0 db. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f00h parameter id = 0eh bits type default description 31:8 read only 000000h reserved 7 read only 0b long form (lf): connection list is short form. 6:0 read only 0000010b connection list length (cll): two selectable inputs are possible for this widget.
56 ds880f4 CS4207 6.5.6 supported power states get parameter command format: response format: 6.5.7 adc1 connection list entry get parameter command format: response format: 6.5.8 adc1 connecti on select control get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f00h pa rameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 05h verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 12h connection list entry (n+1): returns 12h (digital mic in 2) for n=00h-03h. returns 00h for n>03h. 7:0 read only 0ch connection list entry (n): returns 0ch (line in 1) for n=00h-03h. returns 00h for n>03h. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 05h verb id = f01h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 05h verb id = 701h payload = xxh
ds880f4 57 CS4207 response format: 6.5.9 adc2 connection list entry get parameter command format: response format: 6.5.10 adc2 connection select control get parameter command format: set parameter command format: response format: bits type default description 31:8 read only 000000h reserved 7:0 read/write 00h connection index value: for a get command, this field specifies the current connection index. the field is written by software to indicate the connection index value to be set. 00h: line in 1 (nid=0ch) 01h: digital mic in 2 (nid=12h) bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 06h verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 0eh connection list entry (n+1): returns 0eh (digital mic in 1) for n=00h-03h. returns 00h for n>03h 7:0 read only 0dh connection list entry (n): returns 0dh (mic in 1) for n=00h-03h. returns 00h for n>03h. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 06h verb id = f01h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 06h verb id = 701h payload = xxh bits type default description 31:8 read only 000000h reserved 7:0 read/write 00h connection index value: for a get command, this field specifies the current connection index. the field is written by software to indicate the connection index value to be set. 00h: mic in 1 (nid=0dh) 01h: digital mic in 1 (nid=0eh)
58 ds880f4 CS4207 6.5.11 power states get parameter command format: set parameter command format: response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group no de, the actual power state is a function of both this setting and the powerstate setting of the audio fu nction group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of nod e, this field will be the lower power consuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported
ds880f4 59 CS4207 6.5.12 converter stream, channel get parameter command format: set parameter command format: response format: 6.5.13 converter format get parameter command format: set parameter command format: response format: bits [15:0] must be programmed by software with th e same value programmed into the stream descriptor, so that the data format being transmitted on the link matches what is expected by the consumer of the data. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = f06h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x adc1 node id=05h adc2 node id=06h verb id = 706h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read/write 0h stream number (sn): this field is written by software to indicate the stream number used by the input converter. ?0h? is stream 0, ?1h? is stream 1, etc. by convention, stream 0 is reserved and unused so that converter whose stream number has been reset to ?0h? does not unintentionally decode data not intended for them. 3:0 read/write 0h lowest channel number (lcn): this field is written by software to indicate the lowest channel used by the input converter. the stereo con- verter will use this lcn value plus 1 for its left and right channel. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x adc1 node id=05h adc2 node id=06h verb id = ah payload = 0000h bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x adc1 node id=05h adc2 node id=06h verb id = 2h payload = xxxxh
60 ds880f4 CS4207 if the type is set to non-pcm, the controller pushes data ov er the link and is not concerned with format- ting. the base rate, data type, and number of words (mult) to send each valid frame are specified to control the rate at which the non-pcm data is sent. bits type default description 31:16 read only 0000h reserved 15 read/write 0b stream type (type): if type is non-zero, the other bits in the format structure have other meanings. 0: pcm 1: non-pcm 14 read/write 0b sample base rate (base): 0 = 48 khz 1 = 44.1 khz 13:11 read/write 000b sample base rate multiple (mult): 000 = 48 khz/44.1 khz or less 001 = x2 (96 khz, 88.2 khz, 32 khz) 010 = x3 (144 khz) 011 = x4 (192 khz, 176.4 khz) 100-111 = reserved 10:8 read/write 000b sample base rate divisor (div): 000 = divide by 1 (48 khz, 44.1 khz) 001 = divide by 2 (24 khz, 22.05 khz) 010 = divide by 3 (16 khz, 32 khz) 011 = divide by 4 (11.025 khz) 100 = divide by 5 (9.6 khz) 101 = divide by 6 (8 khz) 110 = divide by 7 111 = divide by 8 (6 khz) 7 read only 0b reserved 6:4 read/write 000b bits per sample (bits): number of bits in each sample: 000 = 8 bits. the data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. the data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = reserved 3:0 read/write 0000b number of channels (chan): number of chan- nels in each frame of the stream: 0000 = 1 0001 = 2 ? 1111 = 16
ds880f4 61 CS4207 6.5.14 amplifier gain/mute get parameter command format: bits [19:16] = ?bh?, where bi ts [15:0] are defined below: response format: set parameter command format: bits [19:16] = ?3h?, where bits [15:0] are defined below: bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x adc1 node id=05h adc2 node id=06h verb id = bh payload = xxxxh bits [15:0] value description 15 0b get output/input (goi): controls whether the request is for the input amplifier or the output amplifier. when ?0?, the input amplifier is being requested. when ?1?, the output amplifier is being requested. 14 0b ?0?b 13 xb get left/right (glr): this bit controls whether the request is for the left channel amplifier or the right channel amplifier. when ?1?, the left channel amplifier is being requested. when ?0?, the right channel ampli- fier is being requested. 12:4 000000000b reserved 3:0 0000b index (idx): this field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. it is only applicable if ?get output/input? is ?0? which indicates input amplifier is being requested. this field has no meaning and ignored since the widget does not have multiple input amplifiers. it should be always ?0?s. bits type default description 31:8 read only 000000h reserved 7 read only 1b amplifier mute (am): this bit returns the mute setting for the amplifier requested. a 1 indicates the amplifier is in the mute condition. if the ampli- fier requested does not exist, a ?0? will be returned. default equals muted. 6:0 read only 0110011b amplifier gain (ag): this field returns the gain setting for the amplifier requested. if the amplifier requested does not exist, all ?0?s will be returned default equals 0 db. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x adc1 node id=05h adc2 node id=06h verb id = 3h payload = xxxxh bits type default description 15 write only 0b set output amplifier (soa): bit is always ?0? since an output amplifier is not present. 14 write only xb set input amplifier (sia): determines if the value programmed refers to the input amplifier. set to a 1 for the value to be accepted.
62 ds880f4 CS4207 13 write only xb set left amplifier (sla): selects the left chan- nel (channel 0). a 1 indicates that the relevant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 12 write only xb set right amplifier (sra): selects the right channel (channel 1). a 1 indicates that the rele- vant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 11:8 write only 0000b index (idx): this field is used when program- ming the input amplifiers on selector widgets and sum widgets. this field is ignored. 7 write only xb mute (mute): when ?1?, the mute is active. when ?0?, the mute is inactive. 6:0 write only xxxxxxxb gain (gain): specifies the amplifier gain in db. bits type default description
ds880f4 63 CS4207 6.6 s/pdif receiver input conv erter widget (node id = 07h) 6.6.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 1h type (typ): audio input converter widget 19:16 read only 8h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 1b digital (dig): widget is a digital widget. 8 read only 1b connection list (cl): a connection list is present on this widget. 7 read only 1b unsolicited capable (uc): unsolicited response is supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 1b format override (fo): this bit is a ?1? to indi- cate that the widget contains format information, and the ?supported formats? and ?supported pcm bits, rates? should be queried for the wid- get?s format capabilities. 3 read only 0b amplifier paramete r override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
64 ds880f4 CS4207 6.6.2 supported pcm size, rates get parameter command format: response format: 6.6.3 supported st ream formats get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f00h parameter id = 0ah bits type default description 31:21 read only 00000000000b reserved 20 read only 1b 32-bit (32b): 32-bit audio format is supported. 19 read only 1b 24-bit (24b): 24-bit audio format is supported. 18 read only 1b 20-bit (20b): 20-bit audio format is supported. 17 read only 1b 16-bit (16b): 16-bit audio format is supported. 16 read only 0b 8-bit (8b): 8-bit audio format is not supported. 15:12 read only 0h reserved 11 read only 0b rate-12 (r12): 384 khz (48*8) rate is not sup- ported. 10 read only 1b rate-11 (r11): 192.0 khz (48*4) rate is sup- ported. 9 read only 0b rate-10 (r10): 176.4 khz (44.1*4) rate is not supported. 8 read only 1b rate-9 (r9): 96.0 khz (48*2) rate is supported. 7 read only 0b rate-8 (r8): 88.2 khz (44.1*2) rate is not sup- ported. 6 read only 1b rate-7 (r7): 48.0 khz rate is supported. 5 read only 1b rate-6 (r6): 44.1 khz rate is supported. 4 read only 1b rate-5 (r5): 32.0 khz (48*2/3) rate is supported. 3 read only 0b rate-4 (r4): 22.05 khz (44.1/2) rate is not sup- ported. 2 read only 0b rate-3 (r3): 16.0 khz (48/3) rate is not sup- ported 1 read only 0b rate-2 (r2): 11.025 khz (44.1/4) rate is not sup- ported. 0 read only 0b rate-1 (r1): 8.0 khz (48/6) rate is not sup- ported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f00h parameter id = 0bh bits type default description 31:3 read only 0 reserved 2 read only 1b ac-3 (ac3): ac-3 data is supported. 1 read only 0b float32 (flt32): float32 formatted data is not supported on this widget. 0 read only 1b pulse code modulation (pcm): pcm formatted data is supported on this widget.
ds880f4 65 CS4207 6.6.4 connection list length get parameter command format: response format: 6.6.5 supported power states get parameter command format: response format: 6.6.6 connection list entry get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f00h parameter id = 0eh bits type default description 31:8 read only 000000h reserved 7 read only 0b long form (lf): connection list is short form. 6:0 read only 0000001b connection list length (cll): one hard-wired input is possible for this widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 00h connection list entry (n+1): returns 00h for n=00h-03h or n>03h. 7:0 read only 0fh connection list entry (n): returns 0fh (s/pdif rx) for n=00h-03h. returns 00h for n>03h.
66 ds880f4 CS4207 6.6.7 power states get parameter command format: set parameter command format: response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group no de, the actual power state is a function of both this setting and the powerstate setting of the audio fu nction group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of nod e, this field will be the lower power consuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported
ds880f4 67 CS4207 6.6.8 converter stream, channel get parameter command format: set parameter command format: response format: 6.6.9 converter format get parameter command format: set parameter command format: response format: bits [15:0] must be programmed by software with th e same value programmed into the stream descriptor, so that the data format being transmitted on the link matches what is expected by the consumer of the data. if the type is set to non-pcm, the controller pushes data over the link and is not concerned with format- ting. the base rate, data type, and number of words (mult) to send each valid frame are specified to control the rate at which the non-pcm data is sent. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f06h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = 706h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read/write 0h stream number (sn): indicates the stream number used by the input converter. ?0h? is stream 0, ?1h? is stream 1, etc. by convention, stream 0 is reserved and unused so that converter whose stream number has been reset to ?0h? does not unintentionally decode data not intended for them. 3:0 read/write 0h lowest channel number (lcn): indicates the lowest channel used by the input converter. the stereo converter will use this lcn value plus 1 for its left and right channel. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x node id = 07h verb id = ah payload = 0000h bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x node id = 07h verb id = 2h payload = xxxxh bits type default description 31:16 read only 0000h reserved 15 read/write 0b stream type (type): if type is non-zero, the other bits in the format structure have other meanings. 0: pcm 1: non-pcm
68 ds880f4 CS4207 14 read/write 0b sample base rate (base): 0 = 48 khz 1 = 44.1 khz 13:11 read/write 000b sample base rate multiple (mult): 000 = 48 khz/44.1 khz or less 001 = x2 (96 khz, 88.2 khz, 32 khz) 010 = x3 (144 khz) 011 = x4 (192 khz, 176.4 khz) 100-111 = reserved 10:8 read/write 000b sample base rate divisor (div): 000 = divide by 1 (48 khz, 44.1 khz) 001 = divide by 2 (24 khz, 22.05 khz) 010 = divide by 3 (16 khz, 32 khz) 011 = divide by 4 (11.025 khz) 100 = divide by 5 (9.6 khz) 101 = divide by 6 (8 khz) 110 = divide by 7 111 = divide by 8 (6 khz) 7 read only 0b reserved 6:4 read/write 000b bits per sample (bits): number of bits in each sample: 000 = 8 bits. the data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. the data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = reserved 3:0 read/write 0000b number of channels (chan): number of chan- nels in each frame of the stream: 0000 = 1 0001 = 2 ? 1111 = 16 bits type default description
ds880f4 69 CS4207 6.6.10 digital converter control get parameter command format: ** note: address f0eh is not supported. set parameter command format: response format: the s/pdif iec control (sic) bits are supported in one of two ways. in the first case referred to as ?codec formatted spdif,? on an input pcm stream of less than 32 bits, the codec strips off the sic bits before transferring the samples to the system and puts them in the digital converter control for la ter software access. in the second case, referred to as ?software form atted (or raw) spdif,? on a 32-bit input stream, the entire stream is transferred into the system without the codec stripping any bits. however, the codec must properly interpret the sync preamble bits of the str eam and then send the appropriately coded preamble. the iec 60958 specification, section 4.3, ?preambles,? defines the prea mbles and the coding to be used. software will specify the ?b,? ?m,? or ?w? (also known as ?x,? ?y,? or ?z?) preambles by encoding the last four bits of the preamble into the sync preamble se ction (bits 0-3) of the frame. the codec must examine the bits specified and encode the proper preamble based on the previous state. the previous state is to be maintained by the codec hardware. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = f0dh/** payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 07h verb id = 70dh payload = xxh (sic bits [7:0]) cad = x node id = 07h verb id = 70eh payload = xxh (sic bits [15:8]) bits type default description 31:16 read only 0000h reserved 15 read only 0b reserved 14:8 read only 0000000b cc[6:0] (category code): programmed accord- ing to iec standards, or as appropriate. 7 read only 0b l (generation level): programmed according to iec standards, or as appropriate. 6 read only 0b pro (professional): 1 indicates professional use of channel status; 0 indicates consumer. 5 read only 0b /audio (non-audio): 1 indicates data is non- pcm format; 0 indicates data is pcm. 4 read only 1b copy (copyright): 1 indicates copyright is asserted; 0 indicates copyright is not asserted. 3 read only 1b pre (pre-emphasis): 1 indicates filter pre- emphasis is 50/15 us; 0 pre-emphasis is none. 2 read only 0b vcfg (validity config.): this bit is only defined for output converters and is reserved, with a read only value of 0 for input converters. 1 read only 0b v (validity): this bit reflects the ?validity flag,? transmitted in each subframe. 0 read/write 0b digen (digital enable): enables or disables digi- tal transmission. a 1 indicates that the digital data can pass through the node. a 0 indicates that the digital data is blocked from passing through the node, regardless of the state.
70 ds880f4 CS4207 6.7 s/pdif transmitter 1, s/pd if transmitter 2 output converter widgets (node id = 08h, 14h) 6.7.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 0h type (typ): audio output converter widget 19:16 read only 4h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 1b digital (dig): widget is a digital widget. 8 read only 0b connection list (cl): a connection list is not present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 1b format override (fo): this bit is a ?1? to indi- cate that the widget contains format information, and the ?supported formats? and ?supported pcm bits, rates? should be queried for the wid- get?s format capabilities. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
ds880f4 71 CS4207 6.7.2 supported pcm size, rates get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f00h parameter id = 0ah bits type default description 31:21 read only 00000000000b reserved 20 read only 1b 32-bit (32b): 32-bit audio format is supported. 19 read only 1b 24-bit (24b): 24-bit audio format is supported. 18 read only 1b 20-bit (20b): 20-bit audio format is supported. 17 read only 1b 16-bit (16b): 16-bit audio format is supported. 16 read only 0b 8-bit (8b): 8-bit audio format is not supported. 15:12 read only 0h reserved 11 read only 0b rate-12 (r12): 384 khz (48*8) rate is not sup- ported. 10 read only 1b rate-11 (r11): 192.0 khz (48*4) rate is sup- ported. 9 read only 1b rate-10 (r10): 176.4 khz (44.1*4) rate is sup- ported. 8 read only 1b rate-9 (r9): 96.0 khz (48*2) rate is supported. 7 read only 1b rate-8 (r8): 88.2 khz (44.1*2) rate is supported. 6 read only 1b rate-7 (r7): 48.0 khz rate is supported. 5 read only 1b rate-6 (r6): 44.1 khz rate is supported. 4 read only 1b rate-5 (r5): 32.0 khz (48*2/3) rate is supported. 3 read only 0b rate-4 (r4): 22.05 khz (44.1/2) rate is not sup- ported. 2 read only 0b rate-3 (r3): 16.0 khz (48/3) rate is not sup- ported 1 read only 0b rate-2 (r2): 11.025 khz (44.1/4) rate is not sup- ported. 0 read only 0b rate-1 (r1): 8.0 khz (48/6) rate is not sup- ported.
72 ds880f4 CS4207 6.7.3 supported st ream formats get parameter command format: response format: 6.7.4 supported power states get parameter command format: response format: 6.7.5 power states get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f00h pa rameter id = 0bh bits type default description 31:3 read only 0 reserved 2 read only 1b ac-3 (ac3): ac-3 data is supported. 1 read only 0b float32 (flt32): float32 formatted data is not supported on this widget. 0 read only 1b pulse code modulation (pcm): pcm formatted data is supported on this widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f00h pa rameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = 705h payload = xxh
ds880f4 73 CS4207 response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group n ode, the actual power state is a function of both this setting and the powerstate setting of the audio function group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, th is field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of node, this fiel d will be the lower power co nsuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported
74 ds880f4 CS4207 6.7.6 converter stream, channel get parameter command format: set parameter command format: response format: 6.7.7 converter format get parameter command format: set parameter command format: response format: bits [15:0] must be programmed by software with the same value programmed into the stream descriptor, so that the data format being transmitted on the lin k matches what is expected by the consumer of the data. if the type is set to non-pcm, the controller pushes data ov er the link and is not concerned with format- ting. the base rate, data type, and number of words (mult) to send each valid frame are specified to control the rate at which the non-pcm data is sent. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f06h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = 706h payload = xxh bits type default description 31:8 read only 000000h reserved 7:4 read/write 0h stream number (sn): indicates the stream number used by the output converter. ?0h? is stream 0, ?1h? is stream 1, etc. by convention, stream 0 is reserved and unused so that converter whose stream number has been reset to ?0h? does not unintentionally decode data not intended for them. 3:0 read/write 0h lowest channel number (lcn): indicates the lowest channel used by the output converter. the stereo converter will use this lcn value plus 1 for its left and right channel. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = ah payload = 0000h bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = 2h payload = xxxxh
ds880f4 75 CS4207 bits type default description 31:16 read only 0000h reserved 15 read/write 0b stream type (type): if type is non-zero, the other bits in the format structure have other meanings. 0: pcm 1: non-pcm 14 read/write 0b sample base rate (base): 0 = 48 khz 1 = 44.1 khz 13:11 read/write 000b sample base rate multiple (mult): 000 = 48 khz/44.1 khz or less 001 = x2 (96 khz, 88.2 khz, 32 khz) 010 = x3 (144 khz) 011 = x4 (192 khz, 176.4 khz) 100-111 = reserved 10:8 read/write 000b sample base rate divisor (div): 000 = divide by 1 (48 khz, 44.1 khz) 001 = divide by 2 (24 khz, 22.05 khz) 010 = divide by 3 (16 khz, 32 khz) 011 = divide by 4 (11.025 khz) 100 = divide by 5 (9.6 khz) 101 = divide by 6 (8 khz) 110 = divide by 7 111 = divide by 8 (6 khz) 7 read only 0b reserved 6:4 read/write 000b bits per sample (bits): number of bits in each sample: 000 = 8 bits. the data will be packed in memory in 8-bit containers on 16-bit boundaries. 001 = 16 bits. the data will be packed in memory in 16-bit containers on 16-bit boundaries. 010 = 20 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 011 = 24 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 100 = 32 bits. the data will be packed in memory in 32-bit containers on 32-bit boundaries. 101-111 = reserved 3:0 read/write 0000b number of channels (chan): number of chan- nels in each frame of the stream: 0000 = 1 0001 = 2 ? 1111 = 16
76 ds880f4 CS4207 6.7.8 digital converter control get parameter command format: ** note: address f0eh is not supported. set parameter command format: response format: the s/pdif iec control (sic) bits are supported in one of two ways. in the first ca se referred to as ?codec formatted spdif,? if a pcm bit stream of less than 32 bits is specified in the converter format control, then the s/pdif control bits, including the ?v,? ?pre,? ?/audio,? and other such bits are embedded in the stream by the codec using the values (sic bits) from the digital converter control. in the second case referred to as ?software formatted (or ra w) spdif,? if a 32-bit stream is specified in the converter format control, the s/pdif iec cont rol (sic) bits are assumed to be embedded in the stream by software, and the raw 32-bit stream is trans ferred on the link with no modification by the codec. however, the codec must properly in terpret the sync preamble bits of the stream and then send the ap- propriately coded preamble. the iec6 0958 specification, section 4.3, ?preambles,? defines the pream- bles and the coding to be us ed. software will specify the ?b,? ?m,? or ?w? (also known as ?x,? ?y,? or ?z?) preambles by encoding the last four bits of the preamb le into the sync preamble section (bits 0-3) of the frame. the codec must examine the bits specified an d encode the proper preamble based on the previous state. the previous stat e is to be maintained by the codec hardware. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = f0dh/** payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = 70dh payload = xxh (sic bits [7:0]) cad = x s/p tx 1 node id=08h s/p tx 2 node id=14h verb id = 70eh payload = xxh (sic bits [15:8]) bits type default description 31:16 read only 0000h reserved 15 read only 0b reserved 14:8 read/write 0000000b cc[6:0] (category code): programmed accord- ing to iec standards, or as appropriate. 7 read/write 0b l (generation level): programmed according to iec standards, or as appropriate. 6 read/write 0b pro (professional): 1 indicates professional use of channel status; 0 indicates consumer. 5 read/write 0b /audio (non-audio): 1 indicates data is non- pcm format; 0 indicates data is pcm. 4 read/write 0b copy (copyright): 1 indicates copyright is asserted; 0 indicates copyright is not asserted. 3 read/write 0b pre (pre-emphasis): 1 indicates filter pre- emphasis is 50/15 s; 0 pre-emphasis is none.
ds880f4 77 CS4207 2 read/write 0b vcfg (validity config.): determines s/pdif transmitter behavior when data is not being transmitted. when asserted, this bit forces the de-assertion of the s/pdif ?validity? flag, which is bit 28 transmitted in each s/pdif subframe. this bit is only defined for output converters and is defined as reserved, with a read only value of 0 for input converters. ? if ?v? = 0 and ?vcfg?=0, then for each s/pdif subframe (left and right) bit[28] ?validity? flag reflects whether or not an internal codec error has occurred (specifically whether the s/pdif interface received and transmitted a valid sample from the high definition audio link). if a valid sample (left or right) was receiv ed and successfully transmitted, the ?validity? flag should be 0 for that subframe. otherwise, the ?validity? flag for that subframe should be transmitted as ?1.? ? if ?v? = 0 and ?vcfg? = 1, then for each s/pdif subframe (left and right), bit[28] ?validity? flag reflects whether or not an internal codec transmission error has occurred. specifically, an internal codec error should result in the ?validity? flag being set to 1. in the case where the s/pdif transmitter is not receiving a sample or does not receive a valid sample from the high definition audio controller (left or right), the s/pdif transmitter should set the s/pdif ?validity? flag to 0 and pad each of the s/pdif ?audio sample word? in question with 0?s for the subframe in question. if a valid sample (left or right) was receiv ed and successfully transmitted, the ?validity? flag should be 0 for that subframe. ? if ?v? = 1 and ?vcfg? = 0, then each s/pdif subframe (left and right) should have bit[28] ?validity? flag = 1. this tags all s/pdif subframes as invalid. ? ?v? = 1 and ?vcfg? = 1 state is reserved for future use. ? default state, coming out of reset, for ?v? and ?vcfg? should be 0 and 0 respectively. 1 read/write 0b v (validity): this bit affects the ?validity flag,? bit[28] transmitted in each subframe, and enables the s/pdif transmitter to maintain con- nection during error or mute conditions. the behavior of the s/pdif transmitter with respect to this bit depends on the value of the ?vcfg? bit. 0 read/write 0b digen (digital enable): enables or disables digi- tal transmission. a 1 indicates that the digital data can pass through the node. a 0 indicates that the digital data is blocked from passing through the node, regardless of the state. bits type default description
78 ds880f4 CS4207 6.8 headphone pin widge t (node id = 09h) 6.8.1 audio widget capabilities get parameter command format: response format: 6.8.2 pin capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 1b connection list (cl): a connection list is present on this widget. 7 read only 1b unsolicited capable (uc): unsolicited response is supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd.
ds880f4 79 CS4207 6.8.3 connection list length get parameter command format: response format: 6.8.4 supported power states get parameter command format: response format: 15:8 read only 00h vref control (vrefc): vref generation is not supported by this widget. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 0b balanced i/o pins (biop): this widget does not have balanced i/o pins. 5 read only 0b input capable (inc): is not input capable. 4 read only 1b output capable (outc): this bit is ?1? to indi- cate that the widget is output capable. 3 read only 1b headphone drive capable (hdc): widget is capable of driving headphones directly. 2 read only 1b presence detect capable (pdc): a ?1? indi- cates the widget is capable of performing pres- ence detect. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f00h parameter id = 0eh bits type default description 31:8 read only 000000h reserved 7 read only 0b long form (lf): connection list is short form. 6:0 read only 0000001b connection list length (cll): one hard-wired input for this widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits type default description
80 ds880f4 CS4207 6.8.5 connection list entry get parameter command format: response format: 6.8.6 power states get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 00h connection list entry (n+1): returns 00h for n=00h-03h or n>03h. 7:0 read only 02h connection list entry (n): returns 02h (dac1) for n=00h-03h. returns 00h for n>03h. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3.
ds880f4 81 CS4207 ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group n ode, the actual power state is a function of both this setting and the powerstate setting of the audio function group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, th is field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of node, this fiel d will be the lower power co nsuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). 6.8.7 pin widget control get parameter command format: set parameter command format: 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = 707h payload = xxh bits type default description
82 ds880f4 CS4207 response format: 6.8.8 unsolicited response control get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be reset by a link rese t or a function group reset: unsolicited response format: bits type default description 31:8 read only 000000h reserved 7 read/write 0b h-phone enable (hpe) : this bit has no effect on the output path. per hd audio spec, a ?1? enables a low impedance amplifier associated with the output. when ?0?, this bit disables a low impedance amplifier associated with the output. 6 read/write 0b output enable (oute) : this bit has no effect on the output path. per hd audio spec, a ?1? enables the output path of the pin widget. when ?0?, the output path of the pin widget is shut off. 5 read only 0b input enable (ine) : set to ?0? since there is no input path associated with the pin widget. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : this field selects one of the possible states for the vref signal(s). the pin widget does not support vref generation as indicated in the pin capabilities. as such, this field will always be ?000b? to select hi-z state. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f08h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = 708h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read/write 0b enable: controls the actual generation of unso- licited responses. 1 is enable; 0 is disable. 6 read only 0b reserved 5:0 read/write 000000b tag: is a 6 bit value assigned and used by soft- ware to determine what codec node generated the unsolicited response. the value programmed into the tag field is returned in the top 6 bits (31:26) of every unsolicited response gener- ated by this node. bits [31:26] bits [25:0] tag response
ds880f4 83 CS4207 6.8.9 pin sense get parameter command format: set parameter command format: get response format: pin sense execute format: 6.8.10 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be pre- served across reset events such as link reset or codec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f09h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = 709h payload = xxh bits type default description 31 read only 0b presence detect (pdet) : a ?1? indicates that something is plugged into the jack associated with the pin widget. a ?0? indicates that nothing is plugged in. 30:0 read only 0 impedance sense (imps) : not valid since the widget is not capable of impedance sensing. bits type default description 7:1 write only 0000000b reserved 0 write only 0b right channel (rchan): a write to this bit is ignored since the widget is not capable of imped- ance sensing. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 09h verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 09h verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 09h verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 09h verb id = 71fh payload = xxh (config bits [31:24])
84 ds880f4 CS4207 bits [31:0] are sticky and will not be re set by a link reset or a codec reset: bits type default description 31:30 read/write 00b port connecti vity (pcon): the port complex is connected to a jack. 29:24 read/write 000010b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | front. 23:20 read/write 2h default device (dd): indicates the intended use of the connection is for headphone. 19:16 read/write 1h connection type (ctyp): indicates the type of physical connection is 1/8? jack. 15:12 read/write 4h color (col): this field indicates the color of the physical jack for use by software. the color selected is green. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write fh default association (da): this field is used by software to group pin complex (and therefore jacks) together into func tional blocks to support multichannel ope ration. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 0h sequence (seq): this field indicates the order of the jacks in the association group.
ds880f4 85 CS4207 6.9 line out 1 pin wi dget (node id = 0ah) 6.9.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 1b connection list (cl): a connection list is present on this widget. 7 read only 1b unsolicited capable (uc): unsolicited response is supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 0b amplifier paramete r override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
86 ds880f4 CS4207 6.9.2 pin capabilities get parameter command format: response format: 6.9.3 connection list length get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd. 15:8 read only 00h vref control (vrefc): vref generation is not supported by this widget. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 1b balanced i/o pins (biop): this widget has bal- anced i/o pins. 5 read only 0b input capable (inc): the widget is not input capable. 4 read only 1b output capable (outc): this bit is ?1? to indi- cate that the widget is output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 1b presence detect capable (pdc): this bit is ?1? to indicate that the widget is capable of perform- ing presence detect. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f00h parameter id = 0eh bits type default description 31:8 read only 000000h reserved 7 read only 0b long form (lf): connection list is short form. 6:0 read only 0000001b connection list length (cll): one hard-wired input for this widget.
ds880f4 87 CS4207 6.9.4 supported power states get parameter command format: response format: 6.9.5 connection list entry get parameter command format: response format: 6.9.6 power states get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 00h connection list entry (n+1): returns 00h for n=00h-03h or n>03h. 7:0 read only 03h connection list entry (n): returns 03h (dac2) for n=00h-03h. returns 00h for n>03h. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = 705h payload = xxh
88 ds880f4 CS4207 response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group no de, the actual power state is a function of both this setting and the powerstate setting of the audio fu nction group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of nod e, this field will be the lower power consuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). 6.9.7 pin widget control get parameter command format: set parameter command format: bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = 707h payload = xxh
ds880f4 89 CS4207 response format: 6.9.8 unsolicited response control get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be reset by a link reset or a function group reset: unsolicited res ponse format: bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : set to ?0? since there is no low impedance amplifier associated with this pin widget. 6 read/write 0b output enable (oute) : this bit has no effect on the output path. per hd audio spec, a ?1? enables the output path of the pin widget. when ?0?, the output path of the pin widget is shut off. 5 read only 0b input enable (ine) : set to ?0? since there is no input path associated with the pin widget. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : the pin widget does not support vref generation as indicated in the pin capabilities. as such, this field should always be ?000b? to select the hi-z state. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f08h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = 708h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read/write 0b enable: controls the actual generation of unso- licited responses. 1 is enable; 0 is disable. 6 read only 0b reserved 5:0 read/write 000000b tag: is a 6 bit value assigned and used by soft- ware to determine what codec node generated the unsolicited response. the value programmed into the tag field is returned in the top 6 bits (31:26) of every unsolicited response gener- ated by this node. bits [31:26] bits [25:0] tag response
90 ds880f4 CS4207 6.9.9 pin sense get parameter command format: set parameter command format: get response format: pin sense execute format : 6.9.10 eapd/btl enable get parameter command format: set parameter command format: get response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f09h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = 709h payload = xxh bits type default description 31 read only 0b presence detect (pdet) : a ?1? indicates that there is ?something? plugged into the jack associ- ated with the pin widget. a ?0? indicates that nothing is plugged in. 30:0 read only 0 impedance sense (imps) : not valid since the widget is not capable of impedance sensing. bits type default description 7:1 write only 0000000b reserved 0 write only 0b right channel (rchan): a write to this bit is ignored since the widget is not capable of imped- ance sensing. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f0ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = 70ch payload = xxh bits type default description 31:3 read only 0 reserved 2 read only 0b l-r swap : not valid since the widget is not capable of left/right swapping. 1 read only 0b eapd : eapd is not supported by this pin widget. 0 read/write 0b btl: controls the output configuration of a pin widget which has indicated support for balanced i/o (bit 6, pin capabiliti es parameter). when this bit is 0, the output drivers are configured in nor- mal, single-ended mode; when this bit is 1, they are configured in balanced mode.
ds880f4 91 CS4207 6.9.11 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be pre- served across reset events such as link reset or codec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be reset by a link reset or a codec reset: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ah verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 0ah verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 0ah verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 0ah verb id = 71fh payload = xxh (config bits [31:24]) bits type default description 31:30 read/write 00b port connectivity (pcon): the port complex is connected to a jack. 29:24 read/write 000001b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | rear. 23:20 read/write 0h default device (dd): indicates the intended use of the connection is for line out. 19:16 read/write 1h connection type (ctyp): indicates the type of physical connection is 1/8? jack. 15:12 read/write 4h color (col): this field indicates the color of the physical jack for use by software. the color selected is green. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write fh default association (da): this field is used by software to group pin complex (and therefore jacks) together into functional blocks to support multichannel operation. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 0h sequence (seq): this field indicates the order of the jacks in the association group.
92 ds880f4 CS4207 6.10 line out 2 pin wi dget (node id = 0bh) 6.10.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 0b power control (pc): power state control is not supported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 1b connection list (cl): a connection list is present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
ds880f4 93 CS4207 6.10.2 pin capabilities get parameter command format: response format: 6.10.3 connection list length get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd. 15:8 read only 00h vref control (vrefc): vref generation is not supported by this widget. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 1b balanced i/o pins (biop): this widget has bal- anced i/o pins. 5 read only 0b input capable (inc): the widget is not input capable. 4 read only 1b output capable (outc): this bit is ?1? to indi- cate that the widget is output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 0b presence detect capable (pdc): this bit is ?0? to indicate that the widget is not capable of per- forming presence detect to determine whether there is anything plugged in. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f00h parameter id = 0eh bits type default description 31:8 read only 000000h reserved 7 read only 0b long form (lf): connection list is short form. 6:0 read only 0000001b connection list length (cll): one hard-wired input for this widget.
94 ds880f4 CS4207 6.10.4 connection list entry get parameter command format: response format: 6.10.5 pin widget control get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 00h connection list entry (n+1): returns 00h for n=00h-03h or n>03h. 7:0 read only 04h connection list entry (n): returns 04h (dac3) for n=00h-03h. returns 00h for n>03h. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = 707h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : set to ?0? since there is no low impedance amplifier associated with this pin widget. 6 read/write 0b output enable (oute) : this bit has no effect on the output path. per hd audio spec, a ?1? enables the output path of the pin widget. when ?0?, the output path of the pin widget is shut off. 5 read only 0b input enable (ine) : set to ?0? since there is no input path associated with the pin widget. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : the pin widget does not support vref generation as indicated in the pin capabilities. as such, this field should always be ?000b? to select the hi-z state.
ds880f4 95 CS4207 6.10.6 eapd/btl enable get parameter command format: set parameter command format: get response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f0ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = 70ch payload = xxh bits type default description 31:3 read only 0 reserved 2 read only 0b l-r swap : not valid since the widget is not capable of left/right swapping. 1 read only 0b eapd : eapd is not supported by this pin widget. 0 read/write 0b btl: controls the output configuration of a pin widget which has indicated support for balanced i/o (bit 6, pin capabilities parameter). when this bit is 0, the output drivers are configured in nor- mal, single-ended mode; when this bit is 1, they are configured in balanced mode.
96 ds880f4 CS4207 6.10.7 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and it s state, including any software writ es into the register, must be pre- served across reset events such as link reset or c odec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be re set by a link reset or a codec reset: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0bh verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 0bh verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 0bh verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 0bh verb id = 71fh payload = xxh (config bits [31:24]) bits type default description 31:30 read/write 10b port connecti vity (pcon): the port complex is connected to a fixed function device. 29:24 read/write 010000b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to internal | n/a. 23:20 read/write 1h default device (dd): indicates the intended use of the connection is for speaker. 19:16 read/write 7h connection type (ctyp): indicates the type of physical connection is other analog. 15:12 read/write 0h color (col): this field indicates the color of the physical jack for use by software. the color for an internal connection is unknown. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write fh default association (da): this field is used by software to group pin complex (and therefore jacks) together into func tional blocks to support multichannel ope ration. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 0h sequence (seq): this field indicates the order of the jacks in the association group.
ds880f4 97 CS4207 6.11 line in 1/mic in 2, mic in 1/line in 2 pin wi dgets (node id = 0ch, 0dh) 6.11.1 audio widget capabilities get parameter command format: response format: 6.11.2 line in 1/mic in 2 pin capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 0b connection list (cl): a connection list is not present on this widget. 7 read only 1b unsolicited capable (uc): unsolicited response is supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 1b amplifier paramete r override (apo): this wid- get contains its own amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 1b input amplifier present (iap): input amplifier is present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ch verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd.
98 ds880f4 CS4207 6.11.3 mic in 1/line in 2 pin capabilities get parameter command format: response format: 15:8 read only 00h vref control (vrefc): vref generation is not supported by this widget. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 0b balanced i/o pins (biop): this widget does not have balanced i/o pins. 5 read only 1b input capable (inc): widget is input capable. 4 read only 0b output capable (outc): widget is not output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 1b presence detect capable (pdc): this bit is ?1? to indicate that the widget is capable of perform- ing presence detect to determine whether there is anything plugged in. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd. 15:8 read only 17h vref control (vrefc): vref generation is supported by this widget. ground/80%/50%/hi-z are supported. 100% is not supported. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 1b balanced i/o pins (biop): this widget has bal- anced i/o pins. 5 read only 1b input capable (inc): widget is input capable. 4 read only 0b output capable (outc): widget is not output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 1b presence detect capable (pdc): this bit is ?1? to indicate that the widget is capable of perform- ing presence detect to determine whether there is anything plugged in. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. bits type default description
ds880f4 99 CS4207 6.11.4 input amplifier capabilities get parameter command format: response format: 6.11.5 supported power states get parameter command format: response format: 6.11.6 power states get parameter command format: 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = f00h parameter id = 0dh bits type default description 31 read only 0b mute capable (mc): does not support mute. 30:23 read only 00000000b reserved 22:16 read only 0100111b step size (ss): indicates that the size of each amplifier?s step gain is 10 db. 15 read only 0b reserved 14:8 read only 0000011b number of steps (nos): there are 4 gain steps; 0 db, +10 db, +20 db, and +30 db. 7 read only 0b reserved 6:0 read only 0000000b offset (ofst): indicates that if ?0000000b? is programmed into the amplified gain control, it would result in a gain of 0 db. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = f05h payload = 00h bits type default description
100 ds880f4 CS4207 set parameter command format: response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group no de, the actual power state is a function of both this setting and the powerstate setting of the audio fu nction group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of nod e, this field will be the lower power consuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported
ds880f4 101 CS4207 6.11.7 line in 1/mic in 2 pin widget control get parameter command format: set parameter command format: response format: 6.11.8 mic in 1/line in 2 pin widget control get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ch verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ch verb id = 707h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : not supported on this widget. 6 read only 0b output enable (oute) : not supported on this widget. 5 read/write 0b input enable (ine) : this bit has no effect on the input path. per hd audio spec, when ?1?, this bit enables the input path of the pin widget. when ?0?, the input path of the pin widget is shut off. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : not supported on this widget. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = 707h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : not supported on this widget. 6 read/write 0b output enable (oute) : not supported on this widget. used by whql test to set vrefe = hi-z mode. 5 read/write 0b input enable (ine) : this bit has no effect on the input path. per hd audio spec., when ?1?, this bit enables the input path of the pin widget. when set to ?0?, the input path of the pin widget will continue to operate. 4:3 read only 00b reserved
102 ds880f4 CS4207 6.11.9 unsolicited response control get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be re set by a link reset or a codec reset: unsolicited response format: 2:0 read/write 000b vref enable (vrefe) : this field selects one of the possible states for the vref signal(s). the pin associated with this function is micbias. if the value written to this control does not corre- spond to a supported value (?000?b, ?001?b, ?010?b or ?100?b), the vrefe bits must retain the previous value. ?000?b = hi-z ?001?b = 0.5*va ?010?b = gnd ?100?b = 0.8*va bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = f08h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = 708h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read/write 0b enable: controls the actual generation of unso- licited responses. 1 is enable; 0 is disable. 6 read only 0b reserved 5:0 read/write 000000b tag: is a 6 bit value assigned and used by soft- ware to determine what codec node generated the unsolicited response. the value programmed into the tag field is returned in the top 6 bits (31:26) of every unsolicited response gener- ated by this node. bits [31:26] bits [25:0] tag response bits type default description
ds880f4 103 CS4207 6.11.10 pin sense get parameter command format: set parameter command format: get response format: pin sense execute format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = f09h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = 709h payload = xxh bits type default description 31 read only 0b presence detect (pdet) : a ?1? indicates that there is ?something? plugged into the jack associ- ated with the pin widget. a ?0? indicates that nothing is plugged in. 30:0 read only 0 impedance sense (imps) : not valid since the widget is not capable of impedance sensing. bits type default description 7:1 write only 0000000b reserved 0 write only 0b right channel (rchan): a write to this bit is ignored since the widget is not capable of imped- ance sensing.
104 ds880f4 CS4207 6.11.11 mic in 1/line in 2 eapd/btl enable get parameter command format: set parameter command format: get response format: 6.11.12 line in 1/mic in 2 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and it s state, including any software writ es into the register, must be pre- served across reset events such as link reset or c odec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = f0ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = 70ch payload = xxh bits type default description 31:3 read only 0 reserved 2 read only 0b l-r swap : not valid since the widget is not capable of left/right swapping. 1 read only 0b eapd : not supported on this widget. 0 read/write 0b btl: controls the input configuration of a pin widget which has indicated support for balanced i/o (bit 6, pin capabiliti es parameter). when this bit is 0, the inputs are configured in single-ended or pseudo-differential mode; when this bit is 1, they are configured in balanced (fully differential) mode. note: this bit is ored with the adc2 gain bit in the adc configuration (cir = 0002h) regis- ter of the vendor processing widget (node id = 11h) . bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ch verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0ch verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 0ch verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 0ch verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 0ch verb id = 71fh payload = xxh (config bits [31:24])
ds880f4 105 CS4207 response format: bits [31:0] are sticky and will not be reset by a link reset or a codec reset: 6.11.13 mic in 1/line in 2 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be pre- served across reset events such as link reset or codec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits type default description 31:30 read/write 00b port connectivity (pcon): the port complex is connected to a jack. 29:24 read/write 000001b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | rear. 23:20 read/write 8h default device (dd): indicates the intended use of the connection is for line in. 19:16 read/write 1h connection type (ctyp): indicates the type of physical connection is 1/8? jack. 15:12 read/write 3h color (col): this field indicates the color of the physical jack for use by software. the color selected is blue. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write 5h default association (da): this field is used by software to group pin complex (and therefore jacks) together into functional blocks to support multichannel operation. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 1h sequence (seq): this field indicates the order of the jacks in the association group. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0dh verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 0dh verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 0dh verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 0dh verb id = 71fh payload = xxh (config bits [31:24])
106 ds880f4 CS4207 bits [31:0] are sticky and will not be re set by a link reset or a codec reset: 6.11.14 amplifier gain/mute get parameter command format: bits [19:16] = ?bh?, where bits [15:0] are defined below: bits type default description 31:30 read/write 00b port connecti vity (pcon): the port complex is connected to a jack. 29:24 read/write 000001b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | rear. 23:20 read/write ah default device (dd): indicates the intended use of the connection is for mic in. 19:16 read/write 1h connection type (ctyp): indicates the type of physical connection is 1/8? jack. 15:12 read/write 9h color (col): this field indicates the color of the physical jack for use by software. the color selected is pink. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write 3h default association (da): this field is used by software to group pin complex (and therefore jacks) together into func tional blocks to support multichannel ope ration. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 1h sequence (seq): this field indicates the order of the jacks in the association group. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = bh payload = xxxxh bits [15:0] value description 15 0b get output/i nput (goi): this bit controls whether the request is for the input amplifier or the output amplifier. when ?1?, the output amplifier is being requested. when ?0?, the input amplifier is being requested. 14 0b ?0?b 13 xb get left/right (glr): this bit controls whether the request is for the left channel amplifier or the right channel amplifier. when ?1?, the left channel amplifier is being requested. when ?0?, the right channel ampli- fier is being requested. 12:4 000000000b reserved 3:0 0000b index (idx): this field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. this field has no meaning and ignored since the widget does not have multiple input amplifiers. it should be always ?0?s.
ds880f4 107 CS4207 response format: set parameter command format: bits [19:16] = ?3h?, where bits [15:0] are defined below: bits type default description 31:8 read only 000000h reserved 7 read only 0b amplifier mute (am): mute is not supported by this widget. 6:0 read only 0000000b amplifier gain (ag): this field returns the gain setting for the amplifier requested. if the amplifier requested does not exist, all ?0?s will be returned. default equals 0 db. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x line in 1 node id=0ch mic in 1 node id=0dh verb id = 3h payload = xxxxh bits type default description 15 write only 0b set output amplifier (soa): this bit deter- mines whether the value programmed refers to the output amplifier. this bit should always be ?0? since an output amplifier is not present on this widget. 14 write only xb set input amplifier (sia): this bit determines whether the value programmed refers to the input amplifier. set to a 1 for the value to be accepted. 13 write only xb set left amplifier (sla): selects the left chan- nel (channel 0). a 1 indicates that the relevant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 12 write only xb set right amplifier (sra): selects the right channel (channel 1). a 1 indicates that the rele- vant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 11:8 write only 0000b index (idx): this field is used when program- ming the input amplifiers on selector widgets and sum widgets. this field is ignored. 7 write only 0b mute (mute): when ?0?, the mute is inactive. this field is ignored. 6:0 write only xxxxxxxb gain (gain): specifies the amplifier gain in db. xxxxx00b = 0 db xxxxx01b = +10 db xxxxx10b = +20 db xxxxx11b = +30 db bits(6:2) are not used and are ignored.
108 ds880f4 CS4207 6.12 digital mic in 1, di gital mic in 2 pin widgets (node id = 0eh, 12h) 6.12.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 0b power control (pc): power state control is not supported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 0b connection list (cl): a connection list is not present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 1b amplifier parameter override (apo): this wid- get contains its own amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 1b input amplifier present (iap): input amplifier is present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
ds880f4 109 CS4207 6.12.2 pin capabilities get parameter command format: response format: 6.12.3 input amplifier capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd. 15:8 read only 00h vref control (vrefc): vref not supported. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 0b balanced i/o pins (biop): this widget does not have balanced i/o pins. 5 read only 1b input capable (inc): input capable. 4 read only 0b output capable (outc): not output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 0b presence detect capable (pdc): this bit is ?0? to indicate that the widget is not capable of per- forming presence detect. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = f00h parameter id = 0dh bits type default description 31 read only 0b mute capable (mc): does not support mute. 30:23 read only 00000000b reserved 22:16 read only 0100111b step size (ss): indicates that the size of each amplifier?s step gain is 10 db. 15 read only 0b reserved 14:8 read only 0000010b number of steps (nos): there are 3 gain steps; 0 db, +10 db and +20 db. 7 read only 0b reserved 6:0 read only 0000000b offset (ofst): indicates that if ?0000000b? is programmed into the amplified gain control, it would result in a gain of 0 db.
110 ds880f4 CS4207 6.12.4 pin widget control get parameter command format: set parameter command format: response format: 6.12.5 digital mic in 1 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and it s state, including any software writ es into the register, must be pre- served across reset events such as link reset or c odec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = 707h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : not supported. 6 read only 0b output enable (oute) : not supported. 5 read/write 0b input enable (ine) : this bit, when set to ?1?, enables the data path for the corresponding dmic. when set to ?0?, the data path is disabled and the corresponding adc output is muted. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : vref is not supported on this widget. will always read back ?000? bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0eh verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0eh verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 0eh verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 0eh verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 0eh verb id = 71fh payload = xxh (config bits [31:24])
ds880f4 111 CS4207 response format: bits [31:0] are sticky and will not be reset by a link reset or a codec reset: 6.12.6 digital mic in 2 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be pre- served across reset events such as link reset or codec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits type default description 31:30 read/write 10b port connectivity (pcon): the port complex is connected to a fixed function device. 29:24 read/write 110111b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to other | mobile lid- inside. 23:20 read/write dh default device (dd): indicates the intended use of the connection is for digital in. 19:16 read/write 6h connection type (ctyp): indicates the type of physical connection is other digital. 15:12 read/write 0h color (col): this field indicates the color of the physical jack for use by software. the color for an internal connection is unknown. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write 3h default association (da): this field is used by software to group pin complex (and therefore jacks) together into functional blocks to support multichannel operation. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write eh sequence (seq): this field indicates the order of the jacks in the association group. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 12h verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 12h verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 12h verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 12h verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 12h verb id = 71fh payload = xxh (config bits [31:24])
112 ds880f4 CS4207 bits [31:0] are sticky and will not be re set by a link reset or a codec reset: 6.12.7 amplifier gain/mute get parameter command format: bits [19:16] = ?bh?, where bits [15:0] are defined below: bits type default description 31:30 read/write 10b port connecti vity (pcon): the port complex is connected to a fixed function device. 29:24 read/write 110111b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to other | mobile lid- inside. 23:20 read/write dh default device (dd): indicates the intended use of the connection is for digital in. 19:16 read/write 6h connection type (ctyp): indicates the type of physical connection is other digital. 15:12 read/write 0h color (col): this field indicates the color of the physical jack for use by software. the color for an internal connection is unknown. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write 5h default association (da): this field is used by software to group pin complex (and therefore jacks) together into func tional blocks to support multichannel ope ration. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write eh sequence (seq): this field indicates the order of the jacks in the association group. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = bh payload = xxxxh bits [15:0] value description 15 0b get output/in put (goi): this bit controls whether the request is for the input amplifier or the output amplifier. when ?1?, the output amplifier is being requested. when ?0?, the input amplifier is being requested. 14 0b ?0?b 13 xb get left/right (glr): this bit controls whether the request is for the left channel amplifier or the right channel amplifier. when ?1?, the left channel amplifier is being requested. when ?0?, the right channel ampli- fier is being requested. 12:4 000000000b reserved 3:0 0000b index (idx): this field specifies the input index of the amplifier setting to return if the widget has multiple input amplifiers. this field has no meaning and ignored since the widget does not have multiple input amplifiers. it should be always ?0?s.
ds880f4 113 CS4207 response format: set parameter command format: bits [19:16] = ?3h?, where bits [15:0] are defined below: bits type default description 31:8 read only 000000h reserved 7 read only 0b amplifier mute (am): mute is not supported by this widget. 6:0 read only 0000000b amplifier gain (ag): this field returns the gain setting for the amplifier requested. if the amplifier requested does not exist, all ?0?s will be returned. default equals 0 db. bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x digmic 1 node id=0eh digmic 2 node id=12h verb id = 3h payload = xxxxh bits type default description 15 write only 0b set output amplifier (soa): this bit deter- mines whether the value programmed refers to the output amplifier. this bit should always be ?0? since an output amplifier is not present. 14 write only xb set input amplifier (sia): this bit determines whether the value programmed refers to the input amplifier. set to 1 for the value to be accepted. 13 write only xb set left amplifier (sla): selects the left chan- nel (channel 0). a 1 indicates that the relevant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 12 write only xb set right amplifier (sra): selects the right channel (channel 1). a 1 indicates that the rele- vant amplifier should accept the value being set. if both bits are set, both amplifiers are set. 11:8 write only 0000b index (idx): this field is used when program- ming the input amplifiers on selector widgets and sum widgets. this field is ignored. 7 write only 0b mute (mute): when ?0?, the mute is inactive. this field is ignored. 6:0 write only xxxxxxxb gain (gain): specifies the amplifier gain in db. xxxxx00b = 0 db xxxxx01b = +10 db xxxxx10b = +20 db xxxxx11b = not used bits(6:2) are not used and are ignored.
114 ds880f4 CS4207 6.13 s/pdif receiver input pin widget (node id = 0fh) 6.13.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 1b power control (pc): power state control is sup- ported on this widget. 9 read only 1b digital (dig): widget is a digital widget. 8 read only 0b connection list (cl): a connection list is not present on this widget. 7 read only 1b unsolicited capable (uc): unsolicited response is supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
ds880f4 115 CS4207 6.13.2 pin capabilities get parameter command format: response format: 6.13.3 supported power states get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd. 15:8 read only 00h vref control (vrefc): vref not supported. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 0b balanced i/o pins (biop): this widget does not have balanced i/o pins. 5 read only 1b input capable (inc): widget is input capable. 4 read only 0b output capable (outc): is not output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 1b presence detect capable (pdc): this bit is ?1? to indicate that the widget is capable of perform- ing presence detect. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): a ?0? indi- cates that the widget does not support imped- ance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f00h parameter id = 0fh bits type default description 31 read only 1b epss: converter widget supports extended power states. 30:4 read only 0000000h reserved 3 read only 1b d3sup: d3hot operation is supported. 2 read only 0b d2sup: d2 operation is not supported. 1 read only 0b d1sup: d1 operation is not supported. 0 read only 1b d0sup: d0 operation is supported.
116 ds880f4 CS4207 6.13.4 power states get parameter command format: set parameter command format: response format: ps-set is a powerstate field which defines the current power setting of the referenced node. since this node is of type other than an audio function group no de, the actual power state is a function of both this setting and the powerstate setting of the audio fu nction group node under which this node was enumer- ated (is controlled). ps-act is a powerstate field which indicates the actual power state of this node. within the audio func- tion group node, this field will always be equal to the ps-set field (modulo the time required to execute a power state transition). within this type of nod e, this field will be the lower power consuming state of either a) the ps-set field of the currently referenced node or b) the ps-set field of the audio function group node under which the currently referenced node was enumerated (is controlled). bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f05h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = 705h payload = xxh bits type default description 31:11 read only 00000h reserved 10 read only 1b power state settings reset (ps-settingsre- set): this bit is set to ?1?b when, during any type of reset or low power state transition, the settings within this widget that were changed from the defaults, either by software or hardware, have been reset back to their default state. when these settings have not been reset, this is reported as ?0?b. this bit is always a ?1?b follow- ing a por condition. for more information, see ?power state settings reset (ps-settingsre- set)? on p 28 9 read only 0b reserved 8 read only 0b power state error (ps-error): this bit is not supported and will always return ?0?b when read. 7:4 read only 0011b power state actual (ps-act): this field indi- cates the actual power state of the referenced node. the default state is d3. 3:0 read/write 0011b power state set (ps-set): writes to these bits set the audio function group to the power state as described below: pss = ?0000?b; d0 - fully on. pss = ?0001?b; d1 - not supported pss = ?0010?b; d2 - not supported pss = ?0011?b; d3 - allows for lowest possible power consumption under software control. see ?d3 lower power state support? on page 26 for more information. pss = ?0100?b; d4 - not supported
ds880f4 117 CS4207 6.13.5 pin widget control get parameter command format: set parameter command format: response format: 6.13.6 unsolicited response control get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be reset by a link reset or a function group reset: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = 707h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : not supported on this widget. 6 read only 0b output enable (oute) : not supported on this widget. 5 read/write 0b input enable (ine) : this bit has no effect on the input path. per hd audio spec., when ?1?, this bit enables the input path of the pin widget. when ?0?, the input path of the pin widget is shut off. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : vref is not supported on this widget. these bits are ignored and always report ?000?. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f08h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = 708h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read/write 0b enable: determines if a change in receiver lock status will generate an unsolicited response (0 = no, 1 = yes). if enabled, and the lock status changes from ?lock? to ?unlock? or ?unlock? to ?lock?, an unsolicited response will be sent. the default value after cold or regis- ter reset for this register (0b) specifying no unso- licited response. 6 read only 0b reserved
118 ds880f4 CS4207 unsolicited response format: 6.13.7 pin sense get parameter command format: set parameter command format: get response format: pin sense execute format: 5:0 read/write 000000b tag: is a 6-bit value assigned and used by soft- ware to determine what codec node generated the unsolicited response. the value programmed into the tag field is returned in the top 6 bits (31:26) of every unsolicited response gener- ated by this node. bits [31:26] bits [25:0] tag response bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f09h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = 709h payload = xxh bits type default description 31 read only 0b presence detect (pdet) : a ?1? indicates that there is ?something? plugged into the jack associ- ated with the pin widget. a ?0? indicates that nothing is plugged in. 30:0 read only 0 impedance sense (imps) : not valid since the widget is not capable of impedance sensing. bits type default description 7:1 write only 0000000b reserved 0 write only 0b right channel (rchan): a write to this bit is ignored since the widget is not capable of imped- ance sensing. bits type default description
ds880f4 119 CS4207 6.13.8 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be pre- served across reset events such as link reset or codec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be reset by a link reset or a codec reset: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 0fh verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 0fh verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 0fh verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 0fh verb id = 71fh payload = xxh (config bits [31:24]) bits type default description 31:30 read/write 00b port connectivity (pcon): the port complex is connected to a jack. 29:24 read/write 000010b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | front. 23:20 read/write ch default device (dd): indicates the intended use of the connection is for s/pdif in. 19:16 read/write 4h connection type (ctyp): indicates the type of physical connection is rca jack. 15:12 read/write eh color (col): this field indicates the color of the physical jack for use by software. the color selected is white. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write fh default association (da): this field is used by software to group pin complex (and therefore jacks) together into functional blocks to support multichannel operation. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 0h sequence (seq): this field indicates the order of the jacks in the association group.
120 ds880f4 CS4207 6.14 s/pdif transmitter 1, s/pdif transmitte r 2 output pin widgets (node id = 10h, 15h) 6.14.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=10h s/p tx 2 node id=15h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 4h type (typ): pin complex widget 19:16 read only 1h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 0b power control (pc): power state control is not supported on this widget. 9 read only 1b digital (dig): widget is a digital widget. 8 read only 1b connection list (cl): a connection list is present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): output ampli- fier is not present for this widget. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 1b stereo (st): a 1 indicates a stereo widget.
ds880f4 121 CS4207 6.14.2 pin capabilities get parameter command format: response format: 6.14.3 connection list length get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=10h s/p tx 2 node id=15h verb id = f00h parameter id = 0ch bits type default description 31:17 read only 0 reserved 16 read only 0b eapd capable (eapdc): this widget does not support eapd. 15:8 read only 00h vref control (vrefc): vref not supported. 7 read only 0b hdmi capable (hdmic): this widget is not capable of supporting hdmi. 6 read only 0b balanced i/o pins (biop): this widget does not have balanced i/o pins. 5 read only 0b input capable (inc): widget is not input capa- ble. 4 read only 1b output capable (outc): this bit is ?1? to indi- cate that the widget is output capable. 3 read only 0b headphone drive capable (hdc): widget is not capable of driving headphones directly. 2 read only 0b presence detect capable (pdc): this bit is ?0? to indicate that the widget is not capable of per- forming presence detect to determine whether there is anything plugged in. 1 read only 0b trigger required (tr): trigger is not required for an impedance measurement. 0 read only 0b impedance sense capable (isc): this bit is ?0? to indicate that the widget does not support impedance sense on the attached peripheral. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=10h s/p tx 2 node id=15h verb id = f00h parameter id = 0eh bits type default description 31:8 read only 000000h reserved 7 read only 0b long form (lf): connection list is short form. 6:0 read only 0000001b connection list length (cll): one hard-wired input for this widget.
122 ds880f4 CS4207 6.14.4 s/pdif transmitter 1 connection list entry get parameter command format: response format: 6.14.5 s/pdif transmitter 2 connection list entry get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 10h verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 00h connection list entry (n+1): returns 00h for n=00h-03h or n>03h. 7:0 read only 08h connection list entry (n): returns 08h (s/pdif out 1) for n=00h-03h. returns 00h for n>03h. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 15h verb id = f02h payload = n = xxh bits type default description 31:24 read only 00h connection list entry (n+3): returns 00h for n=00h-03h or n>03h. 23:16 read only 00h connection list entry (n+2): returns 00h for n=00h-03h or n>03h. 15:8 read only 00h connection list entry (n+1): returns 00h for n=00h-03h or n>03h. 7:0 read only 14h connection list entry (n): returns 14h (s/pdif out 2) for n=00h-03h. returns 00h for n>03h.
ds880f4 123 CS4207 6.14.6 pin widget control get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=10h s/p tx 2 node id=15h verb id = f07h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x s/p tx 1 node id=10h s/p tx 2 node id=15h verb id = 707h payload = xxh bits type default description 31:8 read only 000000h reserved 7 read only 0b h-phone enable (hpe) : not supported. 6 read/write 0b output enable (oute) : this bit has no effect on the output path. per hd audio spec., when ?1?, this bit enables the output path of the pin widget. when ?0?, the output path is shut off. 5 read only 0b input enable (ine) : set to ?0? since there is no input path associated with the pin widget. 4:3 read only 00b reserved 2:0 read only 000b vref enable (vrefe) : the pin widget does not support vref generation as indicated in the pin capabilities. as such, this field should always be ?000b? to select the hi-z state.
124 ds880f4 CS4207 6.14.7 s/pdif transmitter 1 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and it s state, including any software writ es into the register, must be pre- served across reset events such as link reset or c odec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be re set by a link reset or a codec reset: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 10h verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 10h verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 10h verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 10h verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 10h verb id = 71fh payload = xxh (config bits [31:24]) bits type default description 31:30 read/write 00b port connecti vity (pcon): the port complex is connected to a jack. 29:24 read/write 000001b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | rear. 23:20 read/write 4h default device (dd): indicates the intended use of the connection is for s/pdif out. 19:16 read/write 4h connection type (ctyp): indicates the type of physical connection is rca jack. 15:12 read/write 6h color (col): this field indicates the color of the physical jack for use by software. the color selected is orange. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write fh default association (da): this field is used by software to group pin complex (and therefore jacks) together into func tional blocks to support multichannel ope ration. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 0h sequence (seq): this field indicates the order of the jacks in the association group.
ds880f4 125 CS4207 6.14.8 s/pdif transmitter 2 configuration default the configuration default register is used by software as an aid in determining the configuration of jacks and devices attached to the codec. at the time the codec is first powered on, this register is internally load- ed with default values indicating the typical system use of this particular pin/jack. after this initial loading, it is completely codec opaque, and its state, including any software writes into the register, must be pre- served across reset events such as link reset or codec reset (the function reset verb). its state need not be preserved across power level changes. get parameter command format: set parameter command format: response format: bits [31:0] are sticky and will not be reset by a link reset or a codec reset: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 15h verb id = f1ch payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 15h verb id = 71ch payload = xxh (config bits [7:0]) cad = x node id = 15h verb id = 71dh payload = xxh (config bits [15:8]) cad = x node id = 15h verb id = 71eh payload = xxh (config bits [23:16]) cad = x node id = 15h verb id = 71fh payload = xxh (config bits [31:24]) bits type default description 31:30 read/write 00b port connectivity (pcon): the port complex is connected to a jack. 29:24 read/write 000001b location (loc): this field indicates the physical location of the jack or device to which the pin complex is connected. set to external | rear. 23:20 read/write 4h default device (dd): indicates the intended use of the connection is for s/pdif out. 19:16 read/write 5h connection type (ctyp): indicates the type of physical connection is optical jack. 15:12 read/write 1h color (col): this field indicates the color of the physical jack for use by software. the color selected is black. 11:8 read/write 0h miscellaneous (misc): no pdc override. 7:4 read/write fh default association (da): this field is used by software to group pin complex (and therefore jacks) together into functional blocks to support multichannel operation. all jacks with the same association number may be assumed to be grouped together. a value of all ?0?s is reserved. a value of all ?1?s in this field indicates that the association has the lowest priority. 3:0 read/write 0h sequence (seq): this field indicates the order of the jacks in the association group.
126 ds880f4 CS4207 6.15 vendor processing widget (node id = 11h) 6.15.1 audio widget capabilities get parameter command format: response format: 6.15.2 processing capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 11h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only fh type (typ): vendor defined widget 19:16 read only 0h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 0b power control (pc): power state control is not supported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 0b connection list (cl): connection list is not present. 7 read only 0b unsolicited capable (uc): not supported. 6 read only 1b processing widget (pw): widget does contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): set to ?0? to indicate that the widget does not contain format information. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): not present. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 0b stereo (st): a 0 indicates not supported. bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 11h verb id = f00h parameter id = 10h bits type default description 31:16 read only 0000h reserved 15:8 read only 16h numcoeff: number of coefficients. there are a total of 22 registers. 7:1 read only 0000000b reserved 0 read only 0b benign: this processing widget is not linear and time invariant.
ds880f4 127 CS4207 6.15.3 processing state get parameter command format: set parameter command format: response format: 6.15.4 coefficient index the coefficient index is a zero-based inde x into the processing coefficient list which will be either read or written using the processing coefficient control. when the coefficient has been read or written to, the coefficient index will automatically in crement by one so that the next se t processing coefficient verb will load the coefficient into the next slot. the auto-in crement feature can be disabled by setting the disable coefficient index auto-increment bit in the dac configuration (cir = 0003h) register. the auto-increment feature will ?wrap around? at a coeffi cient index value of 04h, that is an index of 04h will be auto-incre- mented to an index of 00h. if coefficient index is set to be greater than the number of ?slots? in the pro- cessing coefficient list, unpr edictable behavior will result if an attempt is made to get or set the processing coefficient. get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 11h verb id = f03h payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 11h verb id = 703h payload = xxh bits type default description 31:8 read only 000000h reserved 7:0 read/write 00h hda defined processing state: writes to these bits set the widget to the processing state as described below: ?00?h; processing off. ?01?h; processing on. ?02?h; processing benign. benign state is not supported. will be treated as ?processing off?. ?03?h - ?7f?h; - reserved bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x node id = 11h verb id = dh payload = 0000h bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x node id = 11h verb id = 5h payload = xxxxh bits type default description 31:16 read only 0000h reserved 15:0 read/write 0000h index n: coefficient index value.
128 ds880f4 CS4207 6.15.5 processing coefficient processing coefficient loads the value n into the widget?s coefficient array at the index determined by the coefficient index control. when the coefficient has been read or written to, the coefficient index will au- tomatically increment by one so that the next set processing coefficien t verb will load the coefficient into the next slot. get parameter command format: set parameter command format: response format: 6.15.6 coefficient registers processing coefficient loads the 16-bit value n into the widget?s coefficient array at the index determined by the coefficient index control. when the coeffici ent has been loaded, the c oefficient index will automat- ically increment by one so that th e next set processing coefficient ve rb will load the coefficient into the next slot. coefficient index register summary: bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x node id = 11h verb id = ch payload = 0000h bits [31:28] bits [27:20] bits [19:16] bits [15:0] cad = x node id = 11h verb id = 4h payload = xxxxh bits type default description 31:16 read only 0000h reserved 15:0 read/write 0000h value n: the value n of the 16 bit coefficient to set. coefficient index regi ster (cir) description 0000h s/pdif rx/tx interface status 0001h s/pdif rx/tx interface control 0002h adc configuration 0003h dac configuration 0004h beep configuration
ds880f4 129 CS4207 6.15.6.1 s/pdif rx/tx inte rface status (cir = 0000h) bits type default description 15:10 read only 0 reserved 9 read only 0b 192 khz recovered sample rate - measured audio sample rate of incoming s/pdif data. a ?1?b indicates a 192 khz sample rate. 8 read only 0b 96 khz recovered sample rate - measured audio sample rate of incoming s/pdif data. a ?1?b indicates a 96 khz sample rate. 7 read only 0b 48 khz recovered sample rate - measured audio sample rate of incoming s/pdif data. a ?1?b indicates a 48 khz sample rate. 6 read only 0b 44.1 khz recovered sample rate - measured audio sample rate of incoming s/pdif data.a ?1?b indicates a 44.1 khz sample rate. 5 read only 0b 32 khz recovered sample rate - measured audio sample rate of incoming s/pdif data. a ?1?b indicates a 32 khz sample rate. 4 read only 0b ccrc - channel status block cyclic redun- dancy check bit. updated on cs block bound- aries, valid only in pro mode. this bit will go high on occurrence of the error, and will stay high until the register is read. reading the register resets this bit to 0, unless the error condition is still true. 0 - no error. 1 - error. 3 read only 0b bip - bi-phase error bit. updated on sub-frame boundaries. this bit will go high on occur- rence of the error, and will stay high until the register is read. reading the register resets this bit to 0, unless the error condition is still true. 0 - no error. 1 - bi-phase error. this indicates an error in the received bi-phase coding. 2 read only 0b par - parity bit. updated on sub-frame bound- aries. this bit will go high on occurrence of the error, and will stay high until the register is read. reading the register resets this bit to 0, unless the error condition is still true. 0 - no error. 1 - parity error. 1 read only 0b spul - s/pdif receiver unlock indicator 1 - the receiver is unlocked or has transition-ed from lock to unlock since the last read. 0 - the receiver is locked and has not transition- ed from lock to unlock since the last read. 0 read only 0b spl - s/pdif receiver lock indicator 1 - the receiver is locked or has transition-ed from unlock to lock since the last read. 0 - the receiver is unlocked and has not transi- tion-ed from unlock to lock since the last read.
130 ds880f4 CS4207 6.15.6.2 s/pdif rx/tx inte rface control (cir = 0001h) bits type default description 15 read only 0b reserved 14 read/write 0b tx 2 enable: routes s/pdif transmitter 2 to the gpio1/dmic_sda2/spdif_out2 pin. 0 - the pin functions as gpio1 or dmic_sda2, according to dmic2 enable . 1 - the pin functions as spdif_out2, regard- less of dmic2 enable . 13 read/write 0b reserved 12 read/write 0b tx 2 raw data mode : enables aes3 direct mode. in this mode, a direct copy of the received nrz data from the hd audio bus is sent to s/pdif transmitter 2. 0 - normal s/pdif tx 2 data mode. 1 - enable raw s/pdif tx 2 data mode. 11 read/write 0b rx to tx 2 loopthru : this bit is used to enable an internal loop through from the s/pdif rx to s/pdif tx 2. the path is a straight digital mux from input to output. no re-clocking is performed. 0 - do not loop s/pdif rx to s/pdif tx 2. 1 - enable s/pdif rx to s/pdif tx 2 loopthru. 10 read/write 0b rx a/b chnl status select: specifies the chan- nel from which to extract the channel status bits. ?0?b - select channel a status. ?1?b - select channel b status. 9:8 read/write 00b reserved 7 read/write 0b tx 1 raw data mode : enables aes3 direct mode. in this mode, a direct copy of the received nrz data from the hd audio bus is sent to s/pdif transmitter 1. 0 - normal s/pdif tx 1 data mode. 1 - enable raw s/pdif tx 1 data mode. 6 read/write 0b rx raw data mode : enables aes3 direct mode. in this mode, a direct copy of the received nrz data from the s/pdif receiver including the c, u, and v bits are transmitted to the hd audio bus. the time slot occupied by the z bit is used to indicate the location of the block start. 0 - normal s/pdif rx data mode. 1 - enable raw s/pdif rx data mode. 5 read/write 0b rx to tx 1 loopthru : this bit is used to enable an internal loop through from the s/pdif rx to s/pdif tx 1. the path is a straight digital mux from input to output. no re-clocking is performed. 0 - do not loop s/pdif rx to s/pdif tx 1. 1 - enable s/pdif rx to s/pdif tx 1 loopthru.
ds880f4 131 CS4207 6.15.6.3 adc configur ation (cir = 0002h) 4:3 read/write 01b hold[1:0] ? determines how received aes3 audio sample is affected when an receive error occurs. the errors that affect hold behavior are parity, bi-phase and confidence. hold has no effect in raw s/pdif rx data mode. 00 - hold last audio sample. 01 - replace the current audio sample with all zeros (mute). 10 - do not change the received audio sample. 11 - reserved 2 read/write 0b trunc ? determines if the audio word length is set according to the incoming channel status data as decoded by the aux[3:0] bits. the resulting word length in bits is 24 minus aux[3:0]. the trunc function is valid only on pcm audio data. 0 ? incoming data is not truncated. 1 ? incoming data is truncated according to the length specified in the channel status data. trunc has no effect on output data if detected as being non-audio. 1 read/write 0b src_mute ? when src_mute is set to ?1?, the src will soft-mute when it loses lock and soft unmute when it regains lock. 0 - soft mute disabled 1 - soft mute enabled 0 read/write 0b reserved bits type default description 15 read/write 0b urg (unsolicited response gating): this bit allows unsolicited responses to be gated. 0 - normal propagation of unsolicited responses. 1 - unsolicited responses are gated if afg is in d3. 14 read/write 0b adc2 gain: this bit adjusts the gain of the mic in 1/line in 2 path for the given input topology. 0 - 6 db gain added (pseudo-differential and sin- gle-ended mode). 1 - no gain added (fully differential mode). note: this bit is ored with the btl bit in the mic in 1/line in 2 eapd/btl enable control. 13 read/write 0b adc1 gain: this bit adjusts the gain of the line in 1/mic in 2 path for the given input topology. 0 - 6 db gain added (pseudo-differential and sin- gle-ended mode). 1 - no gain added (not supported - test only). bits type default description
132 ds880f4 CS4207 12:11 read/write 00b adc2 channel mode[1:0]: controls the chan- nel mapping from the adc2 output to the hda bus. ?00?b - adc2 left channel is mapped to hda left channel and adc2 right channel is mapped hda right channel (normal mode). ?01?b - adc2 left channel is mapped to both hda left and right channels. adc2 right channel is discarded (mono mode). ?10?b - adc2 right channel is mapped to both hda left and right channels. adc2 left channel is discarded (alternate mono mode). ?11?b - adc2 left channel is mapped to hda right channel and adc2 right channel is mapped to hda left channel (channel swap mode). 10:9 read/write 00b adc1 channel mode[1:0]: controls the chan- nel mapping from the adc1 output to the hda bus. ?00?b - adc1 left channel is mapped to hda left channel and adc1 right channel is mapped hda right channel (normal mode). ?01?b - adc1 left channel is mapped to both hda left and right channels. adc1 right channel is discarded (mono mode). ?10?b - adc1 right channel is mapped to both hda left and right channels. adc1 left channel is discarded (alternate mono mode). ?11?b - adc1 left channel is mapped to hda right channel and adc1 right channel is mapped to hda left channel (channel swap mode). 8:6 read/write 000b reserved 5 read/write 0b adc2 pga mode: sets the topology for the mic in 1/line in 2 pga. 0 - fully differential or pseudo-differential mode. 1 - single-ended mode. 4 read/write 0b adc1 pga mode: sets the topology for the line in 1/mic in 2 pga. 0 - pseudo-differential mode. 1 - single-ended mode. 3:2 read/write 10b adc2 szcmode[1:0]: same function as adc1. see below. bits type default description
ds880f4 133 CS4207 1:0 read/write 10b adc1 szcmode[1:0]: sets the mode by which analog pga and digital volume, and muting changes will be implemented. see ?input ampli- fier capabilities? section on page 55 regarding digital and analog volume ranges. ?00?b - immediate change: when immediate change is selected, all level changes will take effect immediately in one step ?01?b - digital immediate and analog zero cross: dictates that signal level changes, both muting and gain/attenuation, will occur immediately for digital volume changes, and on a signal zero crossing for analog volume changes to minimize audible artifacts. the requested level change will occur after a timeout period of 1024/fs (approx. 21 ms @ fs = 48 khz) if the signal does not encounter a zero crossing. ?10?b - digital soft ramp and analog soft ramp: allows level changes, both muting and gain/attenuation, to be implemented by incre- mentally ramping at a rate of 1/8 db per audio sample period for digital volume changes, and at a rate of 1 db per 8 audio sample periods for analog volume changes. if the analog pga is being used for +10 db ?boost? function, or the digital mic is being used, then the digital soft ramp gain range will be from +12 db to -51 db, and analog soft ramp will not be used. ?11?b - digital soft ramp and analog zero cross: allows level changes, both muting and gain/attenuation, to be implemented by incre- mentally ramping at a rate of 1/8 db per audio sample period for digital volume changes. ana- log volume changes are to be implemented on a signal zero crossing. the requested level change will occur after a timeout period of 1024/fs (approx. 21 ms @ fs = 48 khz) if the signal does not encounter a zero crossing. if the analog pga is being used for +10 db ?boost? function, or the digital mic is being used, then the digital soft ramp gain range will be from +12 db to -51 db and analog soft ramp will not be used. both soft ramp and zero cross are independently monitored and implemented for each channel. bits type default description
134 ds880f4 CS4207 6.15.6.4 dac configur ation (cir = 0003h) bits type default description 15:13 read/write 000b reserved 12 read/write 1b enable dacs high pass filter: when set to ?1?b, will enable a high pass filter to remove any dc component. ?0?b - disable hpf. ?1?b - enable hpf. 11 read/write 0b power down internal references (pdref): when set to ?1?b, will ramp the internal voltage references down. this should be used prior to removing operating voltages from the codec. ?0?b - normal operation. ?1?b - power down internal references. 10 read/write 0b disable coefficient in dex auto-increment: specifies if the coefficient index value will be automatically incremented following a read or write operation. auto increment is supported by vista os. ?0?b - auto increment coefficient index following a read or write. ?1?b - do not auto increment coefficient index fol- lowing a read or write. 9:7 read/write 000b reserved 6 read/write 1b mute dac outputs on fifo error: specifies to force a mute condition if an under-run or over-run condition occurs on the hd audio fifo memory. the transition to mute will occur as per the set- tings of each of the dacx szcmode bits. ?0?b - disable mute dac outputs on fifo error. ?1?b - enable mute dac outputs on fifo error. 5:4 read/write 10b dac3 szcmode[1:0]: same function as dac1. see below. 3:2 read/write 10b dac2 szcmode[1:0]: same function as dac1. see below.
ds880f4 135 CS4207 6.15.6.5 beep configur ation (cir = 0004h) 1:0 read/write 10b dac1 szcmode[1:0]: sets the soft ramp and zero crossing detection modes by which volume and muting changes will be implemented. ?00?b - immediate change: when immediate change is selected, all level changes will take effect immediately in one step ?01?b - zero cross: dictates that signal level changes, both muting and gain/attenuation, will occur on a signal zero crossing to minimize audi- ble artifacts. the requested level change will occur after a timeout period of 512/fs (approxi- mately 11 ms @ fs = 48 khz) if the signal does not encounter a zero crossing. ?10?b - soft ramp: allows level changes, both muting and gain/attenuation, to be implemented by incrementally ramping, in 1/8 db steps, from the current level to the new level at a rate of 1/8 db per audio sample period. ?11?b - soft ramp on zero cross: dictates that signal level changes, both muting and gain/atten- uation, will occur in 1/8 db steps and be imple- mented on a signal zero crossing. the 1/8 db level change will occur after a timeout period of 512/fs (approximately 11 ms @ fs = 48 khz) if the signal does not encounter a zero crossing. both soft ramp and zero cross are independently monitored and implemented for each channel. bits type default description 15:5 read only 0 reserved 4 read/write 0b dmic2 enable: specifies whether gpio1 or dig- ital mic interface 2 is enabled. ?0?b - gpio1 enabled, digital mic 2 disabled. ?1?b - digital mic 2 enabled, gpio1 disabled. 3 read/write 0b dmic1 enable: specifies whether gpio0 or dig- ital mic interface 1 is enabled. ?0?b - gpio0 enabled, digital mic 1 disabled. ?1?b - digital mic 1 enabled, gpio0 disabled. 2 read/write 1b dac3 beep enable: this bit allows the output from the beep generator to be passed to dac3. 1 read/write 1b dac2 beep enable: this bit allows the output from the beep generator to be passed to dac2. 0 read/write 1b dac1 beep enable: this bit allows the output from the beep generator to be passed to dac1. bits type default description
136 ds880f4 CS4207 6.16 beep generator widget (node id = 13h) 6.16.1 audio widget capabilities get parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 13h verb id = f00h parameter id = 09h bits type default description 31:24 read only 00h reserved 23:20 read only 7h type (typ): beep generator widget 19:16 read only 0h delay (dly): number of sample delays through the widget. 15:12 read only 0h reserved 11 read only 0b l-r swap (lrs): this widget is not capable of swapping the left and right channels. 10 read only 0b power control (pc): power state control is not supported on this widget. 9 read only 0b digital (dig): widget is not a digital widget. 8 read only 0b connection list (cl): a connection list is not present on this widget. 7 read only 0b unsolicited capable (uc): unsolicited response is not supported on this widget. 6 read only 0b processing widget (pw): this widget does not contain ?processing controls? parameters. 5 read only 0b stripe (strp): striping is not supported. 4 read only 0b format override (fo): this widget does not contain format information. 3 read only 0b amplifier parameter override (apo): this wid- get does not contain amplifier parameters. 2 read only 0b output amplifier present (oap): not present. 1 read only 0b input amplifier present (iap): input amplifier is not present for this widget. 0 read only 0b stereo (st): not supported.
ds880f4 137 CS4207 6.16.2 beep generation control get parameter command format: set parameter command format: response format: bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 13h verb id = f0ah payload = 00h bits [31:28] bits [27:20] bits [19:8] bits [7:0] cad = x node id = 13h verb id = 70ah payload = xxh bits type default description 31:8 read only 000000h reserved 7:0 read/write 00h divider: when set to 0, beep generation is turned off. when set to any other value, beep generation is turned on and the frequency of the beep equals 12 khz divided by this value.
138 ds880f4 CS4207 7. applications 7.1 hd audio interface 7.1.1 multi-channel streams the CS4207 codec supports multi-channel streams (streams with sample blocks containing more than two samples), on both inbound and outbound frames. each of the 5 output converter widgets (dac1/2/3, s/pdif tx 1/2) can be associated with an individua l stream, or multiple widgets can be grouped to share the same stream. a mix of shared and individual streams is also supported. furthermore, the order in which channels are assigned to each widget is not co nstrained by design. however, the following limita- tions exist and must be avoided: ? a stream cannot contain channels that are not a ssociated with any widget (unused channels), unless those channels appear last within the stream packet, after all other channels ? the same channel cannot be asso ciated with more than one widget the same capabilities and limitations exist for the 3 input conv erter widgets (adc1/2, s/pdif rx). the following table gives some examples of valid and invalid stream formats: table 4. stream format examples the curly brackets { } delineate each stream packet. the letters within curly brackets designate each channel within that stream packet. for instance the se quence ?{a, b, c, d} {e, f}? denotes two streams - one stream consisting of 4 channels a-d an d one stream consisting of 2 channels e-f. stream format dac1 dac2 dac3 spdo1 spdo2 comment {a,b} {c,d} {e,f} {g,h} {i,j} a, b c, d e, f g, h i, j indiv. streams, in-order assignment {a, b, c, d, e, f, g, h, i, j} a, b c, d e, f g, h i, j shared stream, in-order assignment {a, b, c, d} {e, f} a, b c, d e, f - - mixed shared and indiv. streams {a, b} {c, d} - - c, d - a, b indiv. streams, out of order assignment {a, b, c, d, e, f, g, h, i, j} g, h e, f a, b i, j c, d shared stream, out of order assignment {a, b, c, d} - - - c, d - invalid: leading unused ch. (a, b) {a, b, c, d, e, f, g, h, i, j} a, b e, f g, h i, j - invalid: intermittent unused ch. (c, d) {a, b, c, d, e, f, g, h, i, j} a, b c, d e, f g, h - ok: trailing unused ch. (i, j) {a, b, c, d} a, b c, d - a, b - invalid: ch. assigned to mult. widgets
ds880f4 139 CS4207 7.2 analog inputs the analog inputs of the CS4207 can be configured as single-ended, pseudo- differential, or fully differential topologies. see tables 5 and 6 for the register settings required to place the analog inputs into the appro- priate topology. the adc1 gain, adc2 gain, adc1 pga mode, and a dc2 pga mode bits are located in the adc configuration (cir = 0002h) register of the vendor processing widget (node id = 11h) . table 5. line in 1/mic in 2 input topology register settings table 6. mic in 1/line in 2 input topology register settings note: alternatively, the btl bit in the mic in 1/line in 2 eapd/btl enable control of the mic in 1/line in 2 pin widget (node id = 0dh) may be set to ?1?b to put adc2 in fully differential mode. both analog stereo input pairs may be used with single- ended line or microphone inputs. in this configura- tion the linein_c-, micin_l-, and micin_r- pins are internally disconnected and should be left floating. see figure 11 for the recommended single-ended input filter. adc1 gain adc1 pga mode figure single-ended 0 1 11 pseudo-differential (default) 0 0 12 adc2 gain ( note: ) adc2 pga mode figure single-ended 0 1 11 pseudo-differential (default) 0 0 12 fully differential 1 0 13 linein_l+ 1800 pf 1800 pf 100 k ? 100 ? linein_r+ * * 1 f 1 f 100 k ? 100 ? npo/c0 g dielectric capacitors. note : 1. these capacitors serve as a charge reservoir for the internal switched capacitor adc modulators and should be placed as close as possible to the inputs . note 1 * low esr, x7 r/x5r dielectric capacitors. ** ** ** micin_l+ 1800 pf 1800 pf 100 k ? 100 ? micin_r+ * * 1 f 1 f 100 k ? 100 ? ** ** linein_c- micin_l- micin_r- n/c n/c CS4207 + - pga - + pga - + pga + - pga agnd // left analog input 1 // right analog input 1 // left analog input 2 // right analog input 2 n/c vcom vcom vcom figure 11. single-ended input filter
140 ds880f4 CS4207 for an improvement from using the single-ended circuitry, both analog stereo input pairs may be configured in a pseudo-differential topology. this provides co mmon-mode noise rejection for single-ended inputs by differentially routing linein _c-, micin_l-, and/or micin_ r- with the signal traces. see figure 12 for the recommended pseudo-differential input filter. linein_l+ 1800 pf 1800 pf 100 k ? 100 ? linein_r+ * * 1 f 1 f 100 k ? 100 ? npo/c0g dielectric capacitors. note : 1. these capacitors serve as a charge reservoir for the internal switched capacitor adc modulators and should be placed as close as possible to the inputs . note 1 * low esr, x7r/x5r dielectric capacitors. ** ** ** micin_l+ 1800 pf 1800 pf 100 k ? 100 ? micin_r+ * * 1 f 1 f 100 k ? 100 ? ** ** linein_c- micin_l- micin_r- CS4207 1 f ** 100 ? 100 ? 100 ? 1 f ** 1 f ** com mon m ode rejection at input of pga reduces external system noise // // right analog input 2 gnd ( d iffe r e n tia l tr a c e s ) // // left analog input 1 gnd (differential trac es ) // right analog input 1 ( d iffe r e n tia l tr a c e s ) // // left analog input 2 gnd ( d iffe r e n tia l tr a c e s ) + - pga - + pga + - pga - + pga agnd figure 12. pseudo-diff erential input filter
ds880f4 141 CS4207 for the best adc performance, fully differential inputs can be connected to the mic in 1/line in 2 input pair only. this topology provides the best common-mode noise rejection and also increases the dynamic range due to the larger full-scale input voltage. see figure 13 for the recommended diff erential input filter. for all of the input topologies, either input pair c an be used with a microphone input by connecting the micbias pin to the si gnals as shown in figure 1 . if electrolytic capacitors are used for ac coupling the mi- crophone inputs, the positive terminal of the capacitor must be connected to the greater bias voltage. the analog input pins are internally biased at 0.5*va and th e voltage level of the micbias pin can be configured by setting the vrefe bits in the mic in 1/line in 2 pin widget control of the mic in 1/line in 2 pin widget (node id = 0dh). npo/c0g dielectric capacitors. note : 1. these capacitors serve as a charge reservoir for the internal switched capacitor adc modulators and should be placed as close as possible to the inputs . note 1 * low esr, x 7r/x5 r dielectric capacitors. ** micin_l+ 3600 pf 100 k ? 100 ? * 1 f ** micin_l- CS4207 100 k ? 100 ? 1 f ** micin_r+ 3600 pf 100 k ? 100 ? * 1 f ** micin_r- 100 k ? 100 ? 1 f ** agnd + - pga + - pga common mode rejection at input of pga reduces external system noise // left analog input + ( d iffe r e n tia l tr a c e s ) // left analog input - // right analog input + ( d iffe r e n tia l tr a c e s ) // right analog input - figure 13. differential input filter
142 ds880f4 CS4207 7.3 analog outputs 7.3.1 output filter the cirrus application note titled design notes for a 2-pole filter with differential input , available as an48 at www.cirrus.com , discusses the second-order butterworth filter and differential-to-single-ended converter that was implemented on the cdb4207 evaluation board. figure 14 illustrates this implemen- tation. if only single-ended outputs from the CS4207 are required, the passive output filter shown in figure 15 can be used. 7.3.2 analog supply removal in order to reduce audible artifacts, the analog refe rence is always powered up, even if the afg has been transitioned into d3 state. for ma ximum power savings during d3, it may be desirable to completely re- move the analog supplies on the system level. doin g so would cause an uncontrolled discharge of the internal reference and hence audible artifacts, and must therefore be preceded with a controlled reference ramp-down, which is initiated by setting the pdref bit in the dac configuration (cir = 0003h) register of the vendor processing widget (node id = 11h) . 7.4 digital mic inputs for each adc, the data from the digi tal mic input pin widgets are multiplexed with the data from the analog line/mic input pin widgets, and only one pin widget can be selected at any given time. furthermore, the data pins for the dmic interface (dmic_sda1/2) are multip lexed with the gpio0/1 pins and default to gpio. in order to successfully setup the data path for a digi tal microphone, the following steps have to be followed: 1. clear the tx 2 enable bit in the s/pdif rx/tx interface control (cir = 0001h) register of the vendor processing widget (node id = 11h) (only required for dmic2) lineoutx + lineoutx - - + 1000 pf c0g 220 ? 2.26 k ? 3300 pf c0g 698 ? 1.5 k ? 4.53 k ? 2.05 k ? 1.05 k ? 22 ? f 2200 pf c0g 6800 pf c0g 220 pf CS4207 agnd analog output 22 ? f figure 14. differential to single-ended output filter lineoutx + 4.7 f analog output 2700 pf + 47.5 k ? CS4207 agnd 562 ? figure 15. passive single-ended output filter
ds880f4 143 CS4207 2. set the dmic1 enable and/or dmic2 enable bit in the beep configuration (cir = 0004h) register of the vendor processing widget (node id = 11h) 3. set the ine bit in the pin widget control of the digital mic in 1 pin widget (node id = 0eh) and/or the digital mic in 2 pin widget (node id = 12h) 4. for dmic1 set the connection index in the adc2 connection select control of the adc2 input con- verter widget (node id = 06h) to a value of 01h 5. for dmic2 set the connection index in the adc1 connection select control of the adc1 input con- verter widget (node id = 05h) to a value of 01h the clock signal for the dmic interf ace (dmic_scl) will be enabled if at least one of the dmic data paths has been configured as described above. 7.5 s/pdif input and outputs 7.5.1 s/pdif receiver src the s/pdif receiver src is used to sample-rate convert incoming source-synchronous data to hda bus-synchronous data. the src can only convert rates that are close to one anot her, therefore, software must monitor the recovere d sample rate in the s/pdif rx/tx interface status (cir = 0000h) register and program the converter format control of the s/pdif receiver input converter widget (node id = 07h) accordingly. the s/pdif receiver src is on by default and will be turned off if at least one of the following conditions is true: ? type (bit 15) in the converter format control of the s/pdif receiver input converter widget (node id = 07h) is set to ?1?. ? rx raw data mode (bit 6) in the s/pdif rx/tx interface control (cir = 0001h) register is set to ?1?.
144 ds880f4 CS4207 8. pcb layout considerations 8.1 power supply, grounding as with any high-resolution converter, the CS4207 requires careful attention to power supply and grounding arrangements if its potential pe rformance is to be realized. figure 1 on page 11 and figure 2 on page 12 show the recommended power arrangements, with va connected to a clean supply. vd, which powers the digital circuitry, may be run from the system logic supply. to achieve full analog performance, it is strongly recommended that the fo llowing rules be followed: ? place the cap between vbias and va_ref as close to the codec as possible to minimize trace imped- ance ? keep the traces for va and va_ref separate as much as possible and only connect them at the supply extensive use of power and ground planes, ground plane fill in un used areas and surf ace mount decoupling capacitors are recommended. decoupling capacitors should be as close to the pins of the CS4207 as pos- sible. the low value ceramic capacitor should be cl osest to the pin and should be mounted on the same side of the board as the CS4207 to minimize inductance effects. all signals, especially clocks, should be kept away from the filt+ and vcom pins in order to avoid unwanted coupling into the modulators. the cdb4207 evaluation board demonstrates the optim um layout and power supply arrangements. 8.2 qfn thermal pad the CS4207 is available in a compact qfn package. the underside of the qfn package reveals a large metal pad that serves as a thermal relief to provide for maximum heat dissipation. this pad must mate with an equally dimensioned copper pad on the pcb and must be electrically connected to ground. a series of vias should be used to connect this copper pad to one or more larger ground planes on other pcb layers. in split ground systems, it is recommended that this thermal pad be connected to agnd for best perfor- mance. the cdb4207 evaluation board demonstrates the optimum thermal pad and via configuration.
ds880f4 145 CS4207 9. parameter definitions dynamic range the ratio of the rms value of the signal to the rms su m of all other spectral components over the specified bandwidth. dynamic range is a signal-to-noise ratio measurement over the specified band width made with a -60 dbfs signal. 60 db is added to resulting measurement to refer the measurement to full-scale. this technique ensures that the distortion components are below the noise level and do not affect the measure- ment. this measurement technique has been accept ed by the audio engineer ing society, aes17-1991, and the electronic industries association of japan, eiaj cp-307. expressed in decibels. total harmonic distortion + noise the ratio of the rms value of the signal to the rms su m of all other spectral components over the specified band width (typically 10 hz to 20 kh z), including distortion components. expressed in decibels. measured at -1 and -20 dbfs as suggested in aes17-1991 annex a. frequency response a measure of the amplitude response variation from 10 hz to 20 khz relative to the amplitude response at 1 khz. units in decibels. interchannel isolation a measure of crosstalk between the left and right cha nnel pairs. measured for each channel at the convert- er's output with no signal to the input under test and a full-scale signal applied to the other channel. units in decibels. interchannel gain mismatch the gain difference between left and right channel pairs. units in decibels. gain error the deviation from the nominal full-scale an alog output for a full-scale digital input. gain drift the change in gain value with temperature. units in ppm/c. offset error the deviation of the mid-scale transition (111...111 to 000...000) from the ideal. units in mv.
146 ds880f4 CS4207 10.qfn package dimensions thermal characteristics dim min nom max a 0.70 0.75 0.80 a1 0.00 0.05 a3 0.20 bsc b 0.15 0.20 0.25 d 6.00 bsc d2 4.55 4.60 4.65 e 6.00 bsc e2 4.55 4.60 4.65 e 0.40 bsc l 0.30 0.40 0.50 parameter symbol min typ max units junction to ambient thermal impedance 4 layer board junction to case thermal impedance 4 layer board ? ja ? jc - - 24 10 - - c/w c/w side view plane seating top view 1 btm view d e a a1 a3 d2 e2 l e b notes: 1) controlling dimensions are in mm. 2) dimensioning and tolerancing conform to asme y14.5m-1994 3) dimension b applies to the meta llized terminal a nd is measured between 0.15 mm and 0.30 mm from the terminal tip. 4) reference jedec mo-229 48l qfn (6 x 6 mm body) package drawing
ds880f4 147 CS4207 11.ordering information 12.references 1. intel corporation, high definition audio specification, revision 1.0, april 15, 2004. http://download.intel.com/standards/hdaudio/pdf/hdaudio_03.pdf 2. intel corporation, hda006-a: clarification to sub-system identification reporting, december 8, 2005. http://www.intel.com/standar ds/hdaudio/pdf/hda006-a.pdf 3. intel corporat ion, hda022-a: clarification of channel count specification language, december 8, 2005 http://www.intel.com/standar ds/hdaudio/pdf/hda022-a.pdf 4. intel corporation, hda024-a: addition of dual voltage interface support, november 15, 2006. http://download.intel.com/standards/hdaudio/pdf/hda024-a.pdf 5. intel corporation, hda015-b: low power capabilities clarifications and enhancements, june 6, 2009. http://download.intel. com/design/chipsets/hdaudio/hda015-b.pdf 6. cirrus logic, an48: design notes for a 2-pole f ilter with diffe rential input, march 2003. http://www.cirrus.com/en/pubs/appnote/an048rev2.pdf 13.revision history product description package pb-free grade temp range container order # CS4207 low power, 4-in/6-out hd audio codec with headphone amp 48l-qfn yes commercial -40c to +85c tray CS4207-cnz tape & reel CS4207-cnzr CS4207 low power, 4-in/6-out hd audio codec with headphone amp 48l-qfn yes automotive -40c to +105c tray CS4207-dnz tape & reel CS4207-dnzr cdb4207 CS4207 evaluation board - - - - cdb4207 revision changes f1 ? production release f2 ? added ?digital microphone interface characteristics? on page 22 ? updated ?implementation identification? on page 44 as per hda006-a ? updated adc1 szcmode in ?adc configuration (cir = 0002h)? on page 131 ? updated dac1 szcmode in ?dac configuration (cir = 0003h)? on page 134 ? added ?analog inputs? on page 139 ? updated ?qfn package dimensions? on page 146 (updated thermal characteristics) f3 ? updated ?analog input characteristics (commercial - cnz)? on page 14 and ?analog input charac- teristics (automotive - dnz)? on page 15 (corrected micin/linein input impedance) ? added ?s/pdif input and outputs? on page 143 ? updated ?qfn package dimensions? on page 146 (corrected d2, e2, and l dimensions) f4 ? changed CS4207-cnz and CS4207-dnz containers to ?tray? in section 11 .
148 ds880f4 CS4207 contacting cirrus logic support for all product questions and inquiries, contact a cirrus logic sales representative. to find one nearest you, go to www.cirrus.com . important notice cirrus logic, inc. and its subsidiaries (?cirrus?) believe that the information contained in this document is accurate and reli able. however, the information is subject to change without notice and is provided ?as is? without warranty of any kind (express or implied). customers are advised to ob tain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold s ubject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liabil ity. no responsibility is assumed by cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for in fringement of patents or other rights of third parties. this document is the property of cirrus and by furnishing this information, cirrus grants no license, express or impli ed under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual propert y rights. cirrus owns the copyrights associated with the inf ormation contained herein and gives con- sent for copies to be made of the information only for use within your organization with respect to cirrus integrated circuits or other products of cirrus. this consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. certain applications using semi conductor products may involve potential risks of death, per sonal injury, or severe prop- erty or environmental damage (?critical applications?). cirrus products are not designed, au thorized or warranted for use in products surgically implanted into the body, automotive safety or security devices, life su pport products or other crit- ical applications. inclus ion of cirrus products in such appl ications is understood to be full y at the customer?s risk and cir- rus disclaims and makes no warranty, expres s, statutory or implied, including the implied warranties of merchantability and fitness for particular purpose, with regard to any cirrus product that is used in such a manner. if the customer or custom- er?s customer uses or permits the use of cirrus products in cr itical applications, customer agrees, by such use, to fully indemnify cirrus, its officers, directors, employees, distributors and other agents from any a nd all liability, including at- torneys? fees and costs, that may result fr om or arise in connection with these uses. cirrus logic, cirrus, and the cirrus logic logo designs are trademarks of cirrus logic, inc. all other brand and product names in this document may be trademarks or service marks of their respective owners. ac-3 is a trademark of dolby laboratories, inc.

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